TPS73201DBVR datasheet(18/49 Pages) TI

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This noise-reduction effect is shown as RMS Noise Voltage vs CNR (Figure 5-33) in the Typical Characteristics

section.

The TPS73201 adjustable version does not have the NR pin available. However, connecting a feedback

capacitor, CFB, from the output to the feedback pin (FB) reduces output noise and improves load transient

performance.

The TPS732 uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of

the NMOS pass transistor above VOUT. The charge pump generates approximately 250μV of switching noise

at approximately 4MHz; however, charge-pump noise contribution is negligible at the output of the regulator for

most values of IOUT and COUT.

6.3.2 Internal Current Limit

The TPS732 internal current limit helps protect the regulator during fault conditions. Foldback current limit helps

to protect the regulator from damage during output short-circuit conditions by reducing current limit when VOUT

drops below 0.5V. See Figure 5-17 in the Typical Characteristics section for a graph of IOUT vs VOUT.

From Figure 5-17 approximately –0.2V of VOUT results in a current limit of 0mA. Therefore, if OUT is forced

below –0.2V before EN goes high, the device potentially does not start up. In applications that work with both a

positive and negative voltage supply, enable the TPS732 first.

6.3.3 Enable Pin and Shutdown

The enable pin (EN) is active high and is compatible with standard TTL-CMOS levels. A VEN below 0.5V

(maximum) turns the regulator off and drops the GND pin current to approximately 10nA. When EN is used to

shut down the regulator, all charge is removed from the pass transistor gate. A VEN above 1.7V (minimum) turns

the regulator on and the output ramps back up to a regulated VOUT (see Figure 5-39).

When shutdown capability is not required, connect EN to VIN. However, the pass transistor potentially does not

discharge using this configuration, causing the pass transistor to be left on (enhanced) for a significant time

after VIN is removed. This scenario results in reverse current flow (if the IN pin is low impedance) and faster

ramp times upon power up. In addition, for VIN ramp times slower than a few milliseconds, the output potentially

overshoots upon power up.

Current limit foldback prevents device start-up under some conditions. See the Internal Current Limit section.

6.3.4 Dropout Voltage

The TPS732 uses an NMOS pass transistor to achieve extremely low dropout. When (VIN – VOUT) is less than

the dropout voltage (VDO), the NMOS pass transistor is in the linear region of operation and the input-to-output

resistance is the RDS(on) of the NMOS pass transistor.

For large step changes in load current, the TPS732 requires a larger voltage drop from VIN to VOUT to avoid

degraded transient response. The boundary of this transient dropout region is approximately twice the DC

dropout. Values of (VIN – VOUT) above this line provide normal transient response.

Operating in the transient dropout region causes an increase in recovery time. The time required to recover

from a load transient is a function of the magnitude of the change in load current rate, the rate of change in

load current, and the available headroom (VIN to VOUT voltage drop). Under worst-case conditions [full-scale

instantaneous load change with (VIN – VOUT) close to DC dropout levels], the TPS732 takes a couple of hundred

microseconds to return to the specified regulation accuracy.

TPS732

SBVS037Q – AUGUST 2003 – REVISED SEPTEMBER 2024

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