PIC24HJ12GP201ESLASHML datasheet(40/234 Pages) MICROCHIP

40 / 234 page

PIC24HJ12GP201/202

DS70282B-page 38

Preliminary

4.2

RTSP Operation

The PIC24HJ12GP201/202 Flash program memory

array is organized into rows of 64 instructions or 192

bytes. RTSP allows the user application to erase a

page of memory, which consists of eight rows (512

instructions) at a time, and to program one row or one

word at a time. The 8-row erase pages and single row

write rows are edge-aligned from the beginning of

program memory, on boundaries of 1536 bytes and

192 bytes, respectively.

The program memory implements holding buffers that

can contain 64 instructions of programming data. Prior

to the actual programming operation, the write data

must be loaded into the buffers sequentially. The

instruction words loaded must always be from a group

of 64 boundary.

The basic sequence for RTSP programming is to set up

a Table Pointer, then do a series of TBLWT instructions

to load the buffers. Programming is performed by

setting the control bits in the NVMCON register. A total

of 64 TBLWTL and TBLWTH instructions are required

to load the instructions.

All of the table write operations are single-word writes

(two instruction cycles) because only the buffers are

written. A programming cycle is required for

programming each row.

4.3

Control Registers

Two SFRs are used to read and write the program

Flash memory:

• NVMCON: Flash Memory Control Register

• NVMKEY: NonVolatile Memory Key Register

The NVMCON register (Register 4-1) controls which

blocks are to be erased, which memory type is to be

programmed and the start of the programming cycle.

NVMKEY (Register 4-2) is a write-only register that is

used for write protection. To start a programming or

erase

sequence,

the

user

application

must

consecutively write 55h and AAh to the NVMKEY

Refer

Section 4.4

“Programming

Operations” for further details.

4.4

Programming Operations

A complete programming sequence is necessary for

programming or erasing the internal Flash in RTSP

mode. A programming operation is nominally 4 ms in

duration and the processor stalls (waits) until the

operation

finished.

Setting

the

bit

(NVMCON<15>) starts the operation, and the WR bit is

automatically cleared when the operation is finished.

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