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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC16F946-E/MLQTP датащи(PDF) 106 Page - Microchip Technology |
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PIC16F946-E/MLQTP датащи(HTML) 106 Page - Microchip Technology |
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106 / 330 page  PIC16F913/914/916/917/946 DS41250F-page 104 © 2007 Microchip Technology Inc. 6.7 Timer1 Interrupt The Timer1 register pair (TMR1H:TMR1L) increments to FFFFh and rolls over to 0000h. When Timer1 rolls over, the Timer1 interrupt flag bit of the PIR1 register is set. To enable the interrupt on rollover, you must set these bits: • Timer1 interrupt enable bit of the PIE1 register • PEIE bit of the INTCON register • GIE bit of the INTCON register The interrupt is cleared by clearing the TMR1IF bit in the Interrupt Service Routine. 6.8 Timer1 Operation During Sleep Timer1 can only operate during Sleep when setup in Asynchronous Counter mode. In this mode, an external crystal or clock source can be used to increment the counter. To set up the timer to wake the device: • TMR1ON bit of the T1CON register must be set • TMR1IE bit of the PIE1 register must be set • PEIE bit of the INTCON register must be set The device will wake-up on an overflow and execute the next instruction. If the GIE bit of the INTCON register is set, the device will call the Interrupt Service Routine (0004h). 6.9 Clock Source for LCD Module The Timer1 oscillator can be used to provide a clock for the LCD module. This clock may be configured to remain running during Sleep. For more information, see Section 10.0 “Liquid Crys- tal Display (LCD) Driver Module”. FIGURE 6-2: TIMER1 INCREMENTING EDGE Note: The TMR1H:TMR1L register pair and the TMR1IF bit should be cleared before enabling interrupts. T1CKI = 1 when TMR1 Enabled T1CKI = 0 when TMR1 Enabled Note 1: Arrows indicate counter increments. 2: In Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock. |
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