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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC16F946-E/MLQTP датащи(PDF) 86 Page - Microchip Technology |
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PIC16F946-E/MLQTP датащи(HTML) 86 Page - Microchip Technology |
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86 / 330 page  PIC16F913/914/916/917/946 DS41250F-page 84 © 2007 Microchip Technology Inc. 3.9 PORTG and TRISG Registers PORTG is an 8-bit port with Schmitt Trigger input buffers. RG<5:0> are individually configured as inputs or outputs, depending on the state of the port direction. The port bits are also multiplexed with LCD segment functions. PORTG is available on the PIC16F946 only. EXAMPLE 3-7: INITIALIZING PORTG BANKSEL PORTG ; CLRF PORTG ;Init PORTG BANKSEL TRISG ; MOVLW 3Fh ;Set RG<5:0> as inputs MOVWF TRISG ; REGISTER 3-16: PORTG: PORTG REGISTER(1) U-0 U-0 R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x — — RG5 RG4 RG3 RG2 RG1 RG0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-6 Unimplemented: Read as ‘0’ bit 5-0 RG<5:0>: PORTG I/O Pin bits 1 = Port pin is >VIH min. 0 = Port pin is <VIL max. Note 1: PIC16F946 only. REGISTER 3-17: TRISG: PORTG TRI-STATE REGISTER(1) U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 — — TRISG5 TRISG4 TRISG3 TRISG2 TRISG1 TRISG0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-6 Unimplemented: Read as ‘0’ bit 5-0 TRISF<5:0>: PORTG Tri-State Control bits 1 = PORTG pin configured as an input (tri-stated) 0 = PORTG pin configured as an output Note 1: PIC16F946 only. |
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