PIC16F946-ESLASHMLQTP datasheet(36/330 Pages) MICROCHIP

36 / 330 page

PIC16F913/914/916/917/946

DS41250F-page 34

2.2.2.3

INTCON Register

The INTCON register is a readable and writable

for TMR0 register overflow, PORTB change and

external RB0/INT/SEG0 pin interrupts.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE of the INTCON register.

User software should ensure the appropri-

ate interrupt flag bits are clear prior to

enabling an interrupt.

INTCON: INTERRUPT CONTROL REGISTER

R/W-0

R/W-x

GIE

PEIE

T0IE

INTE

RBIE(1)

T0IF(2)

INTF

RBIF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

GIE: Global Interrupt Enable bit

= Enables all unmasked interrupts

= Disables all interrupts

bit 6

PEIE: Peripheral Interrupt Enable bit

= Enables all unmasked peripheral interrupts

= Disables all peripheral interrupts

bit 5

T0IE: Timer0 Overflow Interrupt Enable bit

= Enables the Timer0 interrupt

= Disables the Timer0 interrupt

bit 4

INTE: RB0/INT External Interrupt Enable bit

= Enables the RB0/INT external interrupt

= Disables the RB0/INT external interrupt

bit 3

RBIE: PORTB Change Interrupt Enable bit(1)

= Enables the PORTB change interrupt

= Disables the PORTB change interrupt

bit 2

T0IF: Timer0 Overflow Interrupt Flag bit(2)

= TMR0 register has overflowed (must be cleared in software)

= TMR0 register did not overflow

bit 1

INTF: RB0/INT External Interrupt Flag bit

= The RB0/INT external interrupt occurred (must be cleared in software)

= The RB0/INT external interrupt did not occur

bit 0

RBIF: PORTB Change Interrupt Flag bit

= When at least one of the PORTB general purpose I/O pins changed state (must be cleared in soft-

ware)

= None of the PORTB general purpose I/O pins have changed state

Note 1:

The appropriate bits in the IOCB register must also be set.

T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should be initialized before

clearing T0IF bit.

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