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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PS501 датащи(PDF) 15 Page - Microchip Technology |
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PS501 датащи(HTML) 15 Page - Microchip Technology |
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15 / 42 page  2004 Microchip Technology Inc. DS21818C-page 15 PS501 FIGURE 6-1: CELL BALANCING Cell balancing: entry from main Charging ? Set Appropriate Cell Balancing (ADCON1) per Active Balance flags (1 to 3) Set flag_cell_balance_on = 1 YES NO Set Appropriate Cell Balance flag(s) to Balance during Charge (3 maximum) Set All Cell Balance flags OFF Set flag_cell_balance_on = 0 SOC < r_e_imbalance_SOC (%) ? Any VCELL Delta > r_e_vcell_imbalance_set ? YES YES NO Any VCELL balance flags set ? This algorithm makes the imbalance determination on the discharge cycle near EOD and uses the entire charge cycle for balancing (good for low balance currents) exit back to main YES NO NO flag_cell_imbalance_on set ? Any VCELL delta > r_e_vcell_imbalance_reset ? YES NO Force ADCON1 CB bits to 0 (no balancing during discharge) NO YES |
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