LLCC68 datasheet(7/106 Pages) SEMTECH

7 / 106 page

LLCC68

Data Sheet

Rev. 1.0

DS.LLCC68.W.APP

July 2019

7 of 106

Semtech

www.semtech.com

List of Figures

Figure 2-1: LLCC68 Top View Pin Location QFN 4x4 24L ................................................................... 13

Figure 4-1: LLCC68 Block Diagram............................................................................................................. 22

Figure 4-2: TCXO Control Block................................................................................................................... 24

Figure 4-3: VR_PA versus Output Power on the LLCC68 ................................................................... 27

Figure 4-4: Power Linearity on the LLCC68............................................................................................. 27

Figure 4-5: Current versus Programmed Output Power on the LLCC68...................................... 28

Figure 5-1: LLCC68 Diagram with the DC-DC Regulator Power Option....................................... 30

Figure 5-2: LLCC68 Diagram with the LDO Regulator Power Option ........................................... 30

Figure 5-3: Separate DIO Supply................................................................................................................. 31

Figure 6-1: LoRa® Signal Bandwidth.......................................................................................................... 33

Figure 6-2: LoRa® Packet Format ................................................................................................................ 35

Figure 6-3: Fixed-Length Packet Format ................................................................................................. 40

Figure 6-4: Variable-Length Packet Format ............................................................................................ 40

Figure 6-5: Data Whitening LFSR................................................................................................................ 41

Figure 7-1: Data Buffer Diagram ................................................................................................................. 43

Figure 8-1: SPI Timing Diagram................................................................................................................... 45

Figure 8-2: SPI Timing Transition................................................................................................................ 46

Figure 8-3: Switching Time Definition ...................................................................................................... 47

Figure 8-4: Switching Time Definition in Active Mode....................................................................... 48

Figure 9-1: Transceiver Circuit Modes ...................................................................................................... 55

Figure 13-1: Stopping Timer on Preamble or Header Detection .................................................... 66

Figure 13-2: RX Duty Cycle Energy Profile............................................................................................... 67

Figure 13-3: RX Duty Cycle when Receiving........................................................................................... 68

Figure 14-1: Application Schematic of the LLCC68 with RF Switch ............................................... 96

Figure 16-1: QFN 4x4 Package Outline Drawing................................................................................. 100

Figure 16-2: LLCC68 Marking..................................................................................................................... 101

Figure 16-3: QFN 4x4mm Land Pattern.................................................................................................. 101

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