| поискавой системы для электроныых деталей |
|
M65KA512AB датащи(PDF) 16 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M65KA512AB датащи(HTML) 16 Page - STMicroelectronics |
|
16 / 55 page ![]() Commands M65KA512AB 16/55 4 Commands There are 14 basic commands that control the memory. They can be combined to obtain 21 higher level commands shown in Table 3: Commands. 4.1 Mode Register Set command The Mode Register Set command is issued by applying VIL to E, RAS, CAS and W and by setting BA0 and BA1 to ‘0’. The Mode Register Set command is used to configure the specific mode of operation of the device by programming the Mode Register: ● Burst Length (1, 2, 4, 8, Full Page), ● CAS Latency (2, or 3), ● Burst Type (sequential or interleaved). The Mode Register Set command must be executed after the Power-Up sequence prior to issuing a Bank(Row) Activate command (see Figure 15: Mode Register Set ac waveforms). 4.2 Extended Mode Register Set command The Extended Mode Register Set command is issued by applying VIL to E, RAS, CAS and W, and then by setting BA0 to ‘0’, and BA1 to ‘1’. The Extended Mode Register Set command is used to configure the self refresh operation of the device and the driver strength by programming the Extended Mode Register bits: ● Partial arrays to be refreshed (all banks, two banks, one bank), ● Driver strength (full, 1/2 strength, 1/4 strength, 1/8 strength). The Extended Mode Register bit controlling the Automatic TSCR (A9) should always be cleared to ‘0’ (A9 = ‘1’ is reserved). The Extended Mode Register Set command must be executed after the Power-Up sequence prior to issuing a Bank(Row) Activate command. 4.3 Bank (Row) Activate command The Bank (Row) Activate command is used to activate a row in a specific bank of the device. This command is initiated by driving E and RAS Low, and CAS and W High, VIH, at the positive edge of the clock signal, K. The value on BA1 and BA0 selects the bank, and the value on A0-A12 selects the row. The selected row remains active for column access until a Precharge command is issued to that bank. A minimum time of tRCD is required after issuing the Bank (Row) Active command prior to initiating Read and Write operations from and to the activated bank. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |