SST26VF032B-104ISLASHSM datasheet(14/82 Pages) MICROCHIP

14 / 82 page

SST26VF032B/SST26VF032BA

DS20005218K-page 14

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WRSU

Suspends Program/Erase

B0H

104 MHz

/ 80 MHz

WRRE

Resumes Program/Erase

30H

Protection

RBPR

Read Block Protection

72H

1 to 18

104 MHz

/ 80 MHz

1 to 18

WBPR

Write Block Protection

42H

1 to 18

LBPR

Lock Down

Block Protection

8DH

nVWLDR

nonvolatile Write Lock

Down Register

E8H

1 to 18

ULBPR

Global Block Protection

Unlock

98H

RSID

Read Security ID

88H

1 to 2048

PSID

Program User

Security ID area

A5H

1 to 256

LSID

Lockout Security ID Pro-

gramming

85H

Note 1: Command cycle is two clock periods in SQI mode and eight clock periods in SPI mode.

2: Address bits above the most significant bit of each density can be VIL or VIH.

3: Address, Dummy/Mode bits, and Data cycles are two clock periods in SQI and eight clock periods in SPI

mode.

4: The maximum frequency for all instructions is up to 104 MHz for 2.7V-3.6V and up to 80 MHz for 2.3V-3.6V

unless otherwise noted. For Extended temperature (125°C), max frequency is up to 80 MHz.

5: RST command only executed if RSTEN command is executed first. Any intervening command will disable

Reset.

6: Device accepts eight-clock command in SPI mode, or two-clock command in SQI mode.

7: Data cycles are two clock periods. IOC bit must be set to ‘1’ before issuing the command.

8: Address, Dummy/Mode bits, and data cycles are two clock periods. IOC bit must be set to ‘1’ before issu-

ing the command.

9: Data cycles are four clock periods.

10: Address, Dummy/Mode bits, and Data cycles are four clock periods.

11: Sector Addresses: Use AMS-A12, remaining address are don’t care, but must be set to VIL or VIH.

12: Blocks are 64-Kbyte, 32-Kbyte, or 8-Kbyte, depending on location. Block Erase Address: AMS-A16 for

64 Kbyte; AMS-A15 for 32 Kbyte; AMS-A13 for 8 Kbyte. Remaining addresses are don’t care, but must be set

to VIL or VIH.

TABLE 5-1:

DEVICE OPERATION INSTRUCTIONS FOR SST26VF032B/032BA

Instruction Description

Command

Cycle(1)

Mode

Address

Cycle(s)(1,2)

Dummy

Cycle(s)(3)

Data

Cycle(s)(3)

Max

Freq(1)

SPI SQI

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