SST26VF032B-104ISLASHSM datasheet(25/82 Pages) MICROCHIP

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DS20005218K-page 25

SST26VF032B/SST26VF032BA

5.16

Serial Flash Discoverable

Parameters (SFDP)

The Serial Flash Discoverable Parameters (SFDP)

contain information describing the characteristics of the

device. This allows device-independent, JEDEC ID-

independent, and forward/backward compatible soft-

ware support for all future Serial Flash device families.

See Table 11-1 for address and data values.

Initiate SFDP by executing an 8-bit command, 5AH, fol-

lowed by address bits A[23:0] and a dummy byte. CE#

must remain active-low for the duration of the SFDP

cycle. For the SFDP sequence, see Figure 5-18.

FIGURE 5-18:

SERIAL FLASH DISCOVERABLE PARAMETERS SEQUENCE

5.17

Sector Erase

The Sector Erase instruction clears all bits in the

selected 4-KByte sector to ‘1,’ but it does not change a

protected memory area. Prior to any write operation,

the Write Enable (WREN) instruction must be executed.

To execute a Sector Erase operation, the host drives

CE# low, then sends the Sector Erase command cycle

(20H) and three address cycles, and then drives CE#

high. Address bits [AMS:A12] (AMS = Most Significant

Address) determine the sector address (SAX); the

remaining address bits can be VIL or VIH. To identify the

completion of the internal, self-timed, Write operation,

poll the BUSY bit in the STATUS register, or wait TSE.

See Figure 5-19 and Figure 5-20 for the Sector Erase

sequence.

FIGURE 5-19:

4-KBYTE SECTOR-ERASE SEQUENCE– SQI MODE

FIGURE 5-20:

4 KBYTE SECTOR-ERASE SEQUENCE (SPI)

CE#

SCK

ADD.

012 34 5

6 7 8

ADD.

High-Impedance

15 16

23 24

31 32

39 40

47 48

55 56

63 64

N+2

N+3

N+4

N+1

MSB

MODE 0

MODE 3

DOUT

71 72

DOUT

Note:

MSN = Most Significant Nibble, LSN = Least Significant Nibble, C[1:0] = 20H

MODE 3

SCK

SIO[3:0]

CE#

C1 C0

MODE 0

A5 A4

MSN LSN

A3 A2

A1 A0

CE#

SCK

ADD.

01 2 3 4 5 6 7 8

ADD.

High-Impedance

15 16

23 24

MODE 0

MODE 3

MSB

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