34701 datasheet(32/38 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34701

TYPICAL APPLICATIONS

Linear Regulator Current Limit

As described in the Linear Regulator Functional

Description section, the current limit of the linear regulator

can be adjusted by means of an external current sense

resistor RS. The voltage drop caused by the regulator output

current flowing through the current sense resistor RS is

sensed between the LDO and the CS pins. When the sensed

voltage exceeds 50 mV (typical), the current limit timer starts

to time out while the control circuit limits the output current. If

the overcurrent condition lasts for more than 10 ms, the linear

regulator is shut off and turned on again after 100 ms. This

type of operation provides equivalent protection to the analog

“current foldback” operation.

It is important to keep in mind that the amount of capacitive

load which can be supplied by the by the linear regulator is

limited by the setting of the LDO current limit. During the

power-up period, the linear regulator operates in the current

limit, supplying the current into the load of the LDO, which

includes all the capacitors connected to the regulator output.

If the total amount load is so large that the regulator could not

reach its regulation voltage in 10 ms during the power-up, it

turns off and tries to power up again after 100 ms. This

situation may lead to the power-up oscillations.

Linear Regulator External MOSFET

The linear regulator uses an external N-channel power

MOSFET to provide a pass element for the power path. The

selection of the proper type of the external power MOSFET is

critical for optimum performance and safe operation of the

linear regulator.

The power MOSFET’s threshold voltage, RDS(on), gate

charge, capacitances and transconductance are important

parameters for the stable operation of the linear regulator

while the package of the power MOSFET determines the

maximum power dissipation, and hence the maximum output

current for the required input-to-output voltage drop. The

power dissipation of the external MOSFET can be calculated

from the simple formula:

Where PD(Q) is the power MOSFET power dissipation

VIN is the LDO input voltage,

VLDO is the LDO output voltage,

ILDO is the LDO output load current.

Table 10 shows the recommended power MOSFET types

for the 34701 linear regulator, their typical power dissipation,

and thermal resistance junction-to-case.

NOTE: Freescale does not assume liability, endorse, or warrant

components from external manufacturers referenced in figures

or tables. Although Freescale offers component

recommendations, it is the customer’s responsibility to validate

their application.

*When mounted to an FR4 using 0.5 sq.in. drain pad size

The maximum power dissipation is limited by the

maximum operating junction temperature TJmax. The

allowed power dissipation in the given application can be

calculated from the following expression:

Where PD(Q)max is the power MOSFET maximum

allowed dissipation,

TJmax is the power MOSFET maximum operating

junction temperature,

TA is the ambient temperature,

RthJC is the power MOSFET thermal resistance

junction-to-case,

RthCB is the thermal resistance case-to-board,

RthBA is the thermal resistance board-to-ambient of

the PC board.

PCB Layout Considerations

As with any power application, the proper PCB layout

plays a critical role in the overall power regulator

performance. While good careful printed circuit board layout

significantly improves regulation parameters and

electromagnetic compatibility (EMC) performance of the

switching regulator, poor layout practices can lead not only to

significant degradation of regulation and EMC parameters

but even to total dysfunction of the whole regulator IC.

Extreme care should be taken when laying out the ground

of the regulator circuit. In order to avoid any inductive or

capacitive coupling of the switching regulator noise into the

sensitive analog control circuits, the noisy power ground and

the clean quiet signal ground should be well separated on the

printed circuit board, and connected only at one connection

point. The power routing should be made by heavy traces or

areas of copper. The power path and its return should be

placed, if possible, atop each other on the different layers or

opposite sides of the PC board. The switching regulator input

and output capacitors should be physically placed very close

to the power pins (VIN2, SW, PGND) of the 34701 switching

regulator; and their ground pins, together with the 34701

power ground pins (PGND), should be connected by a single

island of the power ground copper to create the “single-point”

grounding. Figure 32 illustrates the 34701 switching regulator

grounding concept. The bootstrap capacitor Cb should be

tightly connected to the integrated circuit as well.

Table 10. Recommended Power MOSFETs

Part No.

Package

Typ. P

thJ-C

IRL2703S

D2PAK

2.0 W

3.3 °C/W

MTD20N03HDL

DPAK

1.75 W*

1.67 °C/W

()

LDO

–

()

()max

Jmax

–

thJC

thCB

thBA

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