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PLS159 датащи(PDF) 7 Page - NXP Semiconductors |
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PLS159 датащи(HTML) 7 Page - NXP Semiconductors |
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7 / 12 page ![]() tIH1 1.5V 1.5V 1.5V 1.5V 1.5V 1.5V VT 1.5V 1.5V +3V 0V +3V 0V VOH VOL +3V 0V I, B (INPUTS) CLK F (OUTPUTS) OE tIH1 tIS1 tIS1 tCKH tCKL tCKP tCKO tOD1 tOE1 Flip-Flop Outputs I, B (INPUTS) B (OUTPUTS) I, B (OUTPUT ENABLE) tPD tOE2 tOD2 1.5V 1.5V +1.5V +1.5V VT +3V 0V VOH VOL +3V 0V Gate Outputs Power-On Reset +5V 0V VOH VOL +3V 0V 4.5V +3V 0V tPPR tCKO 1.5V 1.5V 1.5V 1.5V 1.5V 1.5V 1.5V F (OUTPUTS) I, B (INPUTS) CLK VCC tIS1 tIS1 tCKH tCKL tCKP Philips Semiconductors Programmable Logic Devices Product specification PLS159A Programmable logic sequencer (16 × 45 × 12) October 22, 1993 31 TIMING DIAGRAMS TIMING DEFINITIONS SYMBOL PARAMETER tCKH Width of input clock pulse. tCKL Interval between clock pulses. tCKP Clock period. tPRH Width of preset input pulse. tIS1 Required delay between beginning of valid input and positive transition of clock. tIS2 Required delay between beginning of valid input forced at flip-flop output pins, and positive transition of clock. tIH1 Required delay between positive transition of clock and end of valid input data. tIH2 Required delay between positive transition of clock and end of valid input data forced at flip-flop output pins. tCKO Delay between positive transition of clock and when outputs become valid (with OE Low). tOE1 Delay between beginning of Output Enable Low and when outputs become valid. tOD1 Delay between beginning of Output Enable High and when outputs are in the OFF-State. tPPR Delay between VCC (after power-on) and when flip-flop outputs become preset at “1” (internal Q outputs at “0”). tPD Propagation delay between combinational inputs and outputs. tOE2 Delay between predefined Output Enable High, and when combinational outputs become valid. tOD2 Delay between predefined Output Enable Low and when combinational outputs are in the OFF-State. tPRO Delay between positive transition of predefined Preset/Reset input, and when flip-flop outputs become valid. |
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