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MPC8313ECVRAFF датащи(PDF) 74 Page - Freescale Semiconductor, Inc

номер детали MPC8313ECVRAFF
подробное описание детали  PowerQUICC??II Pro Processor Hardware Specifications
PDF  88 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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MPC8313ECVRAFF датащи(HTML) 74 Page - Freescale Semiconductor, Inc

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MPC8313E PowerQUICCII Pro Processor Hardware Specifications, Rev. 0
74
Freescale Semiconductor
Clocking
19.3
Example Clock Frequency Combinations
Table 61 shows several possible frequency combinations that can be selected based on the indicated input
reference frequencies, with RCWLR[LBCM] = 0 and RCWLR[DDRCM] =1, such that the LBC operates
with a frequency equal to the frequency of csb_clk and the DDR controller operates at twice the frequency
of csb_clk.
10
0010
12.5:1
8
00
0011
03:1
2
01
0011
03:1
4
10
0011
03:1
8
1
Core VCO frequency = Core frequency
× VCO divider. Note that VCO divider has to be set properly so that the core VCO
frequency is in the range of 400-800MHz.
Table 61. System Clock Frequencies
LBC(lbc_clk)
e300 Core(core_clk)
SYS_CLK_
IN/
PCI_CLK
SPMF
1
vcod
2
vco
CSB(csb_
clk)
DDR
(ddr_clk)
/2
/4
/8
USB
ref 3
× 1
× 1.5 × 2 × 2.5 × 3
24.0
6
2
576.0
144.0
288.0
36
18.0
12.0
144.0
216
288
360
24.0
5
2
480.0
120.0
240.0
60
30
15.0
12.0
120.0
180
240
300
360
25.0
6
2
600.0
150.0
300.0
37.5
18.8
Note 1
150.0
225
300
375
25.0
5
2
500.0
125.0
250.0
62.5 31.25 15.6
Note1
125.0
188
250
313
375
32.0
5
2
640.0
160.0
320.0
40
20.0
16.0
160.0
240
320
32.0
4
2
512.0
128.0
256.0
64
32
16.0
16.0
128.0
192
256
320
384
33.3
5
2
666.0
166.5
333.0
41.63 20.8
Note 1
166.5
250
333
33.3
4
2
532.8
133.2
266.4
66.6
33.3
16.7
Note 1
133.2
200
266
333
400
48.0
3
2
576.0
144.0
288.0
36
18.0
48.0
144.0
216
288
360
Table 60. e300 Core PLL Configuration (continued)
RCWL[COREPLL]
core_clk : csb_clk Ratio
VCO divider 1
0–1
2–5
6



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