34716 datasheet(16/25 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34716

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

ILIM1 pins respectively. A soft start cycle is then initiated to

ramp up the outputs. While channel 1 buck converter uses an

internal reference, channel 2 converter error amplifier uses

the voltage on the VREFOUT pin (VREF) as its reference

voltage. VREF is equal to 1/2 VDDQ, where VDDQ is applied to

the VREFIN pin. This way, the 34716 assures that VREF and

VTT voltages track 1/2 VDDQ to meet DDR requirements.

Soft start is used to prevent the output voltage from

overshooting during startup. At initial startup, the output

capacitor is at zero volts; VOUT = 0 V. Therefore, the voltage

across the inductor will be PVIN during the capacitor charge

phase which will create a very sharp di/dt ramp. Allowing the

inductor current to rise too high can result in a large

difference between the charging current and the actual load

current that can result in an undesired voltage spike once the

capacitor is fully charged. The soft start is active each time

the IC goes out of standby or shutdown mode, power is

recycled, or after a fault retry.

To fully take advantage of soft starting, it is recommended

not to enable the VTT output before introducing VDDQ on the

VREFIN pin. If this happens after a soft start cycle expires

and the VREFIN voltage has a high dv/dt, the output will

naturally track it immediately and ramp up with a fast dv/dt

itself and that will defeat the purpose of soft starting. For

reliable operation, it is best to have the VDDQ voltage

available before enabling the VTT output.

After a successful start-up cycle where the device is

enabled, no faults have occurred, and the output voltages

have reached their regulation point, the 34716 pulls the

power good output signal low after a 10 ms reset delay, to

indicate to the host that the device is in normal operation.

PROTECTION FUNCTIONS

The 34716 monitors the application for several fault

conditions to protect the load from overstress. The reaction of

the IC to these faults ranges from turning off the outputs to

just alerting the host that something is wrong. In the following

paragraphs, each fault condition is explained:

Output Overvoltage

An overvoltage condition occurs once the output voltage

goes higher than the rising overvoltage threshold (VOVR). In

this case, the power good output signal is pulled high, alerting

the host that a fault is present, but the outputs will stay active.

To avoid erroneous overvoltage conditions, a 20 µs filter is

implemented. The buck converter will use its feedback loop

to attempt to correct the fault. Once the output voltage falls

below the falling overvoltage threshold (VOVF), the fault is

cleared and the power good output signal is pulled low, the

device is back in normal operation. The condition is the same

for both outputs.

Output Undervoltage

An undervoltage condition occurs once the output voltage

falls below the falling undervoltage threshold (VUVF). In this

case, the power good output signal is pulled high, alerting the

host that a fault is present, but the outputs will stay active. To

avoid erroneous undervoltage conditions, a 20 µs filter is

implemented. The buck converter will use its feedback loop

to attempt to correct the fault. Once the output voltage rises

above the rising undervoltage threshold (VUVR), the fault is

cleared and the power good output signal is pulled low, the

device is back in normal operation. The condition is the same

for both outputs.

Output Over Current

This block detects over current in the Power MOSFETs of

the buck converter. It is comprised of a sense MOSFET and

a comparator for each channel. The sense MOSFET acts as

a current detecting device by sampling a ratio of the load

current. That sample is compared via the comparator with an

internal reference to determine if the output is in over current

or not. If the peak current in the output inductor reaches the

over current limit (ILIM), the converter will start a cycle-by-

cycle operation to limit the current, and a 10 ms over current

limit timer (tLIM) starts. The converter will stay in this mode of

operation until one of the following occurs:

• The current is reduced back to the normal level before

tLIM expires, and in this case normal operation is

regained.

•tLIM expires without regaining normal operation, at

which point the device turns off the output and the

power good output signal is pulled high. At the end of a

time-out period of 100 ms (tTIMEOUT), the device will

attempt another soft start cycle.

• The device reaches the thermal shutdown limit (TSDFET)

and turns off the output. The power good (PG) output

signal is pulled high.

• The output current keeps increasing until it reaches the

short circuit current limit (ISHORT). See below for more

details.

Short Circuit Current Limit

This block uses the same current detection mechanism as

the over current limit detection block. If the load current

reaches the ISHORT value, the device reacts by shutting down

the output immediately. This is necessary to prevent damage

in case of a permanent short circuit. Then, at the end of a

time-out period of 100 ms (tTIMEOUT), the device will attempt

another soft start cycle.

Thermal Shutdown

Each channel has its own thermal shutdown block.

Thermal limit detection block monitors the temperature of the

device and protects against excessive heating. If the

temperature reaches the thermal shutdown threshold

(TSDFET), the converter output switches off and the power

good output signal indicates a fault by pulling high. The

device will stay in this state until the temperature has

decreased by the hysteresis value and then After a time-out

period (TTIMEOUT) of 100 ms, the device will retry

automatically and the output will go through a soft start cycle.

If successful normal operation is regained, the power good

output signal is asserted low to indicate that.

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