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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TCS34005FN датащи(PDF) 16 Page - OSRAM GmbH |
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TCS34005FN датащи(HTML) 16 Page - OSRAM GmbH |
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16 / 35 page  Datasheet, Public Page 15 [v2-00] 2023-Feb-09 Document Feedback TCS3400 − Register Description RGBC Integration Time Register (ATIME 0x81) The ATIME register controls the internal integration time of the RGBC channel ADCs. Upon power up, the RGBC time register is set to 0xFF. The maximum (or saturation) count value can be calculated based upon the integration time cycles as follows: min [CYCLES * 1024, 65535] Figure 21: RGBC Integration Time Register Wait Time Register (WTIME 0x83) The WTIME controls the amount of time in a low power mode. It is set 2.78 ms increments unless the WLONG bit is asserted in which case the wait times are 12x longer. WTIME is programmed as a 2’s complement number. Upon power up, the wait time register is set to 0xFF. Figure 22: Wait Time Register Note(s): 1. The wait time register should be configured before AEN is asserted. Field Bits Description Value Cycles Time Max Count ATIME 7:0 0xFF 1 2.78 ms 1024 0xF6 10 27.8 ms 10240 0xDB 37 103 ms 37888 0xC0 64 178 ms 65535 0x00 256 712 ms 65535 Field Bits Description Register Value Wait Time Time (WLONG=0) Time (WLONG=1) WTIME 7:0 0xFF 1 2.78 ms 0.03 s 0xAB 85 236 ms 2.84 s 0x00 256 712 ms 8.54 s |
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