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ST10F276 датащи(PDF) 189 Page - STMicroelectronics |
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ST10F276 датащи(HTML) 189 Page - STMicroelectronics |
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189 / 229 page ![]() ST10F276 Electrical characteristics 189/229 23.7.4 Analog reference pins The accuracy of the A/D converter depends on the accuracy of its analog reference: A noise in the reference results in proportionate error in a conversion. A low pass filter on the A/D converter reference source (supplied through pins VAREF and VAGND), is recommended in order to clean the signal, minimizing the noise. A simple capacitive bypassing may be suffi- cient in most cases; in presence of high RF noise energy, inductors or ferrite beads may be necessary. In this architecture, VAREF and VAGND pins also represent the power supply of the analog cir- cuitry of the A/D converter: There is an effective DC current requirement from the reference voltage by the internal resistor string in the R-C DAC array and by the rest of the analog cir- cuitry. An external resistance on VAREF could introduce error under certain conditions: For this rea- sons, series resistance is not advisable and more generally, any series devices in the filter network should be designed to minimize the DC resistance. 23.7.5 Analog input pins To improve the accuracy of the A/D converter, analog input pins must have low AC imped- ance. Placing a capacitor with good high frequency characteristics at the input pin of the device can be effective: The capacitor should be as large as possible, ideally infinite. This capacitor contributes to attenuating the noise present on the input pin; moreover, its source charges during the sampling phase, when the analog signal source is a high-impedance source. A real filter is typically obtained by using a series resistance with a capacitor on the input pin (simple RC Filter). The RC filtering may be limited according to the value of source imped- ance of the transducer or circuit supplying the analog signal to be measured. The filter at the input pins must be designed taking into account the dynamic characteristics of the input sig- nal (bandwidth). Figure 47. A/D converter input pins scheme RF CF RS RL RSW CP2 CS VDD Sampling Source Filter Current Limiter EXTERNAL CIRCUIT INTERNAL CIRCUIT SCHEME RS Source impedance RF Filter resistance CF Filter capacitance RL Current limiter resistance RSW Channel selection switch impedance RAD Sampling switch impedance cp Pin capacitance (two contributions, CP1 and CP2) CS Sampling capacitance CP1 RAD Channel Selection VA |
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