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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F276 датащи(PDF) 185 Page - STMicroelectronics |
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ST10F276 датащи(HTML) 185 Page - STMicroelectronics |
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185 / 229 page  ST10F276 Electrical characteristics 185/229 23.7 A/D converter characteristics VDD = 5V ± 10%, VSS = 0V, TA = –40 to +125°C, 4.5V ≤ VAREF ≤ VDD, VSS ≤ VAGND ≤ VSS + 0.2V Table 93. A/D converter characteristics Symbol Parameter Test condition Limit values Unit Min. Max. VAREFSR Analog reference voltage(1) 1. VAREF can be tied to ground when A/D converter is not in use: An extra consumption (around 200µA) on main VDD is added due to internal analog circuitry not completely turned off. Therefore, it is suggested to maintain the VAREF at VDD level even when not in use, and eventually switch off the A/D converter circuitry setting bit ADOFF in ADCON register. 4.5 VDD V VAGNDSR Analog ground voltage VSS VSS + 0.2 V VAIN SR Analog Input voltage(2) 2. VAIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in these cases will be 0x000H or 0x3FFH, respectively. VAGND VAREF V IAREFCC Reference supply current Running mode (3)Power Down mode 3. Not 100% tested, guaranteed by design characterization. – – 5 1 mA µA tS CC Sample time (4) 4. During the sample time, the input capacitance CAIN can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within t S. After the end of the sample time tS, changes of the analog input voltage have no effect on the conversion result. Values for the sample clock tS depend on programming and can be taken from Table 94. 1– µs tC CC Conversion time (5) 5. This parameter includes the sample time tS, the time for determining the digital result and the time to load the result register with the conversion result. Values for the conversion clock tCC depend on programming and can be taken from next Table 94. 3– µs DNL CC Differential nonlinearity(6) No overload –1 +1 LSB INL CC Integral nonlinearity (6) No overload –1.5 +1.5 LSB OFS CC Offset error (6) No overload –1.5 +1.5 LSB TUE CC Total unadjusted error(6) Port5 Port1 - No overload(3) Port1 - Overload(3) –2.0 –5.0 –7.0 +2.0 +5.0 +7.0 LSB LSB LSB K CC Coupling factor between inputs(3) (7) On both Port5 and Port1 –10–6 – CP1 CC Input pin capacitance(3) (8) –3 pF CP2 CC Port5 Port1 – 4 6 pF pF CS CC Sampling capacitance(3)(8) –3.5 pF RSW CC Analog switch resistance (3) (8) Port5 Port1 – – 600 1600 W W RAD CC –1300 W |
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