ST10F276 datasheet(184/229 Pages) STMICROELECTRONICS

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Electrical characteristics

ST10F276

184/229

Erase suspend latency (6)

–30

µs

Erase suspend request

Rate (6)

Min delay between

two requests

Set protection (6)

170

µs

The figures are given after about 100 cycles due to testing routines (0 cycles at the final customer).

Word and Double Word Programming times are provided as average value derived from a full sector

programming time: Absolute value of a Word or Double Word Programming time could be longer than the

provided average value.

Bank Erase is obtained through a multiple Sector Erase operation (setting bits related to all sectors of the

Bank).

Module Erase is obtained through a sequence of two Bank Erase operations (since each module is

composed by two Banks).

Chip Erase is obtained through a sequence of two Module Erase operations on I- and X-Module.

Not 100% tested, guaranteed by design characterization

Table 92.

Data retention characteristics

Number of program / erase

cycles

(-40°C

≤ TA ≤ 125°C)

Data retention time

(average ambient temperature 60°C)

832 Kbyte

(code store)

64 Kbyte

(EEPROM emulation)(1)

Two 64 Kbyte Flash Sectors may be typically used to emulate up to 4, 8 or 16 Kbytes of EEPROM.

Therefore, in case of an emulation of a 16 Kbyte EEPROM, 100000 Flash Program / Erase cycles are

equivalent to 800000 EEPROM Program/Erase cycles.

For an efficient use of the Read While Write feature and/or EEPROM Emulation please refer to dedicated

Application Note document (AN2061 - EEPROM Emulation with ST10F2xx). Contact your local field

service, local sales person or STMicroelectronics representative to obtain a copy of such a guideline

document.

0 - 100

> 20 years

1000

> 20 years

10000

10 years

100000

1 year

Table 91.

Flash characteristics (continued)

Parameter

Typical

TA = 25°C

Maximum

TA = 125°C

Unit

Notes

0 cycles (1)

100k cycles

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