AT91 datasheet(32/153 Pages) ATMEL

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AT91 датащи(PDF) 32 Page - ATMEL Corporation

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AT91X40 Series

1354D–ATARM–08/02

Additional constraints are applicable to the AT91R40807, the AT91M40807 and the

AT91 40800. The behavior of the EBI is correct when NWAIT is asserted during an

external memory access:

•

When NWAIT is asserted before the first rising edge of MCKI

•

When NWAIT is de-asserted and at least one standard wait state remains to be

executed

These constraints are not applicable to the AT91R40008.

Chip Select Change Wait

States

A chip select wait state is automatically inserted when consecutive accesses are made

to two different external memories (if no wait states have already been inserted). If any

wait states have already been inserted, (e.g., data float wait) then none are added.

Figure 21. Chip Select Wait

Notes:

1. Early Read Protocol

2. Standard Read Protocol

NCS1

NCS2

MCK

Mem 1

Chip Select Wait

Mem 2

NRD

NWE

(1)

(2)

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