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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCA5010H датащи(PDF) 76 Page - NXP Semiconductors |
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PCA5010H датащи(HTML) 76 Page - NXP Semiconductors |
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76 / 112 page  1998 Nov 02 76 Philips Semiconductors Product specification Pager baseband controller PCA5010 Table 61 Notation for data addressing modes Table 62 Hexadecimal opcode cross-reference SYMBOL DESCRIPTION Rn working registers R0 to R7 direct 128 internal RAM locations and any special function register (SFR). @Ri indirect internal RAM location addressed by register R0 or R1 #data 8-bit constant included in instruction #data 16 16-bit constant included as bytes 2 and 3 of instruction bit direct addressed bit in internal RAM or SFR addr16 16-bit destination address. Used by LCALL and LJMP. The branch will be anywhere within the 64 kbytes program memory address space. addr11 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2-kbyte page of program memory as the first byte of the following instruction. rel Signed (two's complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is −128 to +127 bytes relative to first byte of the following instruction. SYMBOL DESCRIPTION * 8, 9, A, B, C, D, E and F • 11, 31, 51, 71, 91, B1, D1 and F1 ♦ 01, 21, 41, 61, 81, A1, C1 and E1 |
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