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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8581 датащи(PDF) 49 Page - Wolfson Microelectronics plc |
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WM8581 датащи(HTML) 49 Page - Wolfson Microelectronics plc |
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49 / 100 page  Production Data WM8581 w PD Rev 4.0 April 2007 49 MANUAL CLOCK SELECTION It is possible to override all default clocking configuration restrictions by setting CLKSEL_MAN. When CLKSEL_MAN is set, default clocking configurations such as automatic selection of PLLACLK for DAC1 when DACSRC=00 (S/PDIF received data) are not applied. Instead, clock selection is determined only by the relevant CLK_SEL register. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R8 CLKSEL 08h 6 CLKSEL_MAN 0 Clock selection auto-configuration override 0 = auto-configuration enabled, clock configuration follows restrictions described in page 43 to page 48. 1 = auto-configuration disabled, clock configuration follows relevant CLKSEL bits in R8 to R11. Table 38 Manual Clock Selection PHASE-LOCKED LOOPS AND S/PDIF CLOCKING (SOFTWARE MODE) The WM8581 is equipped with two independent phase-locked loop clock generators and a comprehensive clocking scheme which provides maximum flexibility and function and many configurable routing possibilities for the user in software mode. An overview of the software mode clocking scheme is shown in Figure 32. Figure 32 PLL and Clock Select Circuit |
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