MP8020 – IEEE 802.3af/at/bt, PoE, POWERED DEVICE INTERFACE

MP8020 Rev. 1.0

MonolithicPower.com

20

2/17/2022

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When PRI is high, pull AUX high to disable the

DET, CLS, and maintain power signature

functions. When PRI is low, pulling AUX high

cannot disable DET, CLS, and maintain power

signature functions.

If an adapter is available, the PG signal is

pulled high under all conditions. If the adapter

has a higher priority and replaces the PSE

power supply, then BT, TYP1, and TYP2 are

updated once the AUX and ADP_UV signals

are working. If the PSE has a higher priority and

replaces the adapter supply, then the MP8020

changes the BT, TYP1, and TYP2 statuses to

Hi-Z once PSE UVLO occurs. The statuses

change to indicate the PSE power type after

inrush is complete and the 90ms delay has

finished.

Power Priority

The adapter is available when both AUX and

VADP exceed the threshold. The MP8020 can

source a current from the adapter or PSE if

both the adapter and PSE are connected. This

is determined by the PRI and AUX pin settings.

The PRI pin is internally pulled up to the internal

VCC. If the PRI pin is floating (the adapter has

higher priority) and VADP/AUX exceed their

thresholds, the MP8020 disables the PSE

power supply, and enables the adapter power

source. If AUX is below its falling threshold,

then the PSE supplies power to the output even

when PRI is floating.

If the PRI pin is connected to GND, the PSE

has the higher priority. Regardless of the AUX

signal, the PSE outputs power unless VDD is

below UVLO.

If the PSE has a higher priority and the adapter

is connected before PSE plug-in, a reverse

blocking MOSFET must be added to reverse

block the power from the adapter during PoE

detection and classification (see Figure 4). At

the same time, the output downstream DC/DC

converter should lower the power rating so that

the inrush current charges the MP8020’s output

capacitor (COUT) quickly. If COUT is not charged

quickly, then the current limit is triggered and

the device fails to start up.

From

PSE

MP8020

GATE1

SRC

GATE2

From

Adapter

VADP

VDD

VOUT

AUX

CLSB

CLSA

TYP1

PG

TYP2

SENSE

ILIM

DUTY

R_MPS

GND

Q2

Q1

Q3

R6

R7

R1

R2

R5

PRI

R8

R3

R4

COUT

Figure 4: Reverse Block Solution

Thermal Protection

Thermal shutdown prevents the IC from

operating at exceedingly high temperatures. If

the die temperature exceeds 150°C, the IC

shuts down. Once the die temperature drops to

20°C, the device resumes normal operation.