CS5323

http://onsemi.com

13

threshold is needed, a circuit like the one in Figure 11 will

lock out the converter until the 12 V supply reaches about

7.0 V.

Figure 11. External UVLO Circuit

COMP

100 k

100 k

50 k

+5 V

+12 V

Remote Sense

In some applications that require remote output voltage

sensing, there are conditions when the path of the feedback

signal can be broken. In a voltage regulator module (VRM)

the remote voltage feedback sense point is typically off the

module. If the module is powered apart from the intended

application, the feedback will be left open. On a

motherboard, the feedback path might be broken when the

processor socket is left open. Without the feedback

connection the output voltage is likely to exceed the

intended voltage. To protect the circuit from overvoltage

conditions, a resistor can be connected between the local

output voltage and the remote sense line as shown in Figure

12.

Figure 12. Remote Sense Connection

100 Ω

Layout Guidelines

With the fast rise, high output currents of microprocessor

applications parasitic inductance and resistance should be

considered when laying out the power, filter and feedback

signal sections of the board. Typically a multi−layer board

with at least one ground plane is recommended. If the layout

is such that high currents can exist in the ground plane

underneath the controller or control circuitry, the ground

plane can be slotted to reroute the currents away from the

controller. The slots should typically not be placed between

the controller and the output voltage or in the return path of

the gate drive. Additional power and ground planes or

islands can be added as required for a particular layout.

Output filter components should be placed on wide planes

connected directly to the load to minimize resistive drops

during heavy loads and inductive drops and ringing during

transients. If required, the planes for the output voltage and

return can be interleaved to minimize inductance between

the filter and load.

Voltage feedback should be taken from a point of the

output or the output filter that doesn’t favor any one phase.

If the feedback connection is closer to one inductor than the

others the ripple associated with that phase may appear

larger than the ripple associated with the other phases and

poor current sharing can result.

The current sense signal is typically tens of milli−volts.

Noise pick−up should be avoided wherever possible.

Current feedback traces should be routed away from noisy

areas such as switch nodes and gate drive signals. The paths

should be matched as well as possible. It is especially

important that all current sense signals be picked off at

similar points for accurate current sharing. If the current

signal is taken from a place other than directly at the inductor

any additional resistance between the pick−off point and the

inductor appears as part of the inherent inductor resistance

and should be considered in design calculations. Capacitors

for the current feedback networks should be placed as close

to the current sense pins as practical.

DESIGN PROCEDURE

Current Sensing, Power Stage and

Output Filter Components

1. Choose the output filter components to meet peak

transient requirements. The formula below can be

used to provide an approximate starting point for

capacitor choice, but will be inadequate to calculate

actual values.

DVPEAK + (DI DT)

ESL ) DI

ESR

Ideally the output filter should be simulated with

models including ESR, ESL, circuit board parasitics

and delays due to switching frequency and converter

response.

Typically

both

bulk

capacitance

(electrolytic, Oscon, etc,) and low impedance

capacitance (ceramic chip) will be required. The bulk

capacitance provides “hold up” during the converter

response. The low impedance capacitance reduces

steady state ripple and bypasses the bulk capacitance

during slewing of output current.

2. For inductive current sensing (only) choose the

current sense network RC to provide a 25 mV

minimum ramp during steady state operation.

R + (VIN * VOUT)

VOUT VIN

F

C

25 mV