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CS5323 датащи(PDF) 7 Page - ON Semiconductor |
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CS5323 датащи(HTML) 7 Page - ON Semiconductor |
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7 / 16 page ![]() CS5323 http://onsemi.com 7 PACKAGE PIN DESCRIPTION PACKAGE PIN # PIN SYMBOL FUNCTION 20 Lead SO Wide 1 ROSC A resistor from this pin to ground sets operating frequency and VFB bias current. 2 COMP Output of the error amplifier and input for the PWM comparators. 3 VFB Voltage Feedback Pin. To use Adaptive Positioning, set the light load offset voltage by connecting a resistor between VFB and CSREF. The resistor and the VFB bias current determine the offset. For no adaptive positioning connect VFB directly to CSREF. 4 VDRP Current sense output for adaptive voltage positioning (AVP). The level of this pin above the DAC voltage is proportional to the output current. Connect a resistor from this pin to VFB to set AVP or leave this pin open for no AVP. 5−7 CS1−CS3 Current sense inputs. Connect current sense network for the corresponding phase to each CSx pin. 8 CSREF Reference for Current Sense Amplifiers. To balance input offset voltages between the inverting and noninverting inputs of the Current Sense Amplifiers, connect a resistor between CSREF and the output voltage. The value should be 1/3 of the value of the resistors connected to the CSx pins. 9 ILIM Sets the threshold for hiccup mode current limit. Connect to reference through a resistive divider. 10 REF Reference output. Decouple with 0.1 μF. 11−15 VID0−VID4 Voltage ID DAC inputs. These pins are internally pulled up to 3.3 V if left open. 16 Gnd IC Gnd. 17−19 GATE1−3 GATE drive signal. 20 VCC Power for IC. |
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