поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

CS5323 датащи(PDF) 12 Page - ON Semiconductor

номер детали CS5323
подробное описание детали  Three?뭁hase Buck Controller with 5?묪it DAC
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5323 датащи(HTML) 12 Page - ON Semiconductor

Back Button CS5323 Datasheet HTML 8Page - ON Semiconductor CS5323 Datasheet HTML 9Page - ON Semiconductor CS5323 Datasheet HTML 10Page - ON Semiconductor CS5323 Datasheet HTML 11Page - ON Semiconductor CS5323 Datasheet HTML 12Page - ON Semiconductor CS5323 Datasheet HTML 13Page - ON Semiconductor CS5323 Datasheet HTML 14Page - ON Semiconductor CS5323 Datasheet HTML 15Page - ON Semiconductor CS5323 Datasheet HTML 16Page - ON Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 12 / 16 page
background image
CS5323
http://onsemi.com
12
order to reduce voltage excursions during transients.
Adaptive voltage positioning can reduce peak−peak output
voltage deviations during load transients and allow for a
smaller output filter. The output voltage can be set higher at
light loads to reduce output voltage sag when the load
current is stepped up and set lower during heavy loads to
reduce overshoot when the load current is stepped up. For
low current applications a droop resistor can provide fast
accurate adaptive positioning. However at high currents, the
loss in a droop resistor becomes excessive. For example; in
a 50 A converter a 1 mΩ resistor to provide a 50 mV change
in output voltage between no load and full load would
dissipate 2.5 Watts.
Lossless adaptive positioning is an alternative to using a
droop resistor, but must respond quickly to changes in load
current. Figure 10 shows how adaptive positioning works.
The waveform labeled normal shows a converter without
adaptive positioning. On the left, the output voltage sags
when the output current is stepped up and later overshoots
when current is stepped back down. With fast (ideal)
adaptive positioning the peak to peak excursions are cut in
half. In the slow adaptive positioning waveform the output
voltage is not repositioned quickly enough after current is
stepped up and the upper limit is exceeded.
Adaptive Positioning
Adaptive Positioning
Normal
Fast
Slow
Limits
Figure 10. Adaptive Positioning
The CS5323 uses two methods to provide fast and
accurate adaptive positioning. For low frequency
positioning the VFB and VDRP pins are used to adjust the
output voltage with varying load currents. For high
frequency positioning, the current sense input pins can be
used to control the power stage output impedance. The
transition between fast and slow positioning is adjusted by
the error amp compensation.
The CS5323 can be configured to adjust the output
voltage based on the output current of the converter. The
adaptive positioning circuit is designed to select the DAC
setting as the maximum output voltage. (Refer to Figure 1 on
page 2.)
To set the no−load positioning a resistor (R9) is placed
between the output voltage and VFB pin. The VFB bias
current will develop a voltage across the resistor to decrease
the output voltage. The VFB bias current is dependent on the
value of ROSC. See Figure 4 on the datasheet.
During no load conditions the VDRP pin is at the same
voltage as the VFB pin, so none of the VFB bias current flows
through the VDRP resistor (R6). When output current
increases the VDRP pin increases proportionally and the
VDRP pin current offsets the VFB bias current and causes the
output voltage to further decrease.
The VFB and VDRP pins take care of the slower and DC
voltage positioning. The first few μs are controlled primarily
by the ESR and ESL of the output filter. The transition
between fast and slow positioning is controlled by the ramp
size and the error amp compensation. If the ramp size is too
large or the error amp too slow there will be a long transition
to the final voltage after a transient. This will be most
apparent with lower capacitance output filters.
Note: Large levels of adaptive positioning can cause pulse
width jitter.
Error Amp Compensation
The transconductance error amplifier can be configured to
provide both a slow soft−start and a fast transient response.
C4 in the main applications diagram controls soft−start. A
0.1 μF capacitor with the 30 μA error amplifier output
capability will allow the output to ramp up at 0.3 V/ms or
1.5 V in 5 ms.
R10 is connected in series with C4 to allow the error
amplifier to slew quickly over a narrow range during load
transients. Here the 30 μA error amplifier output capability
works against 8 kΩ (R10) to limit the window of fast slewing
too 240 mV − enough to allow for fast transients, but not
enough to interfere with soft−start. This window will be
noticeable as a step in the COMP pin voltage at start−up. The
size of this step must be kept smaller than the Channel
Start−Up Offset (nominally 0.4 V) for proper soft−start
operation. If adaptive positioning is used the R9 and R8 form
a divider with the VDRP end held at the DAC voltage during
start−up, which effectively makes the Channel Start−Up
Offset larger.
C12 is included for error amp stability. A capacitive load
is required on the error amp output. Use of values less than
1 nF may result in error amp oscillation of several MHz.
C11 and the parallel resistance of the VFB resistor (R9)
and the VDRP resistor (R6) are used to roll off the error amp
gain. C28 adds a zero to the error amp response to boost the
phase near the crossover frequency.
UVLO
The CS5323 has one undervoltage lockout function
connected to the VCC pin. In applications where the
converter is powered from multiple voltages, additional
UVLO protection might be required if the voltage powering
the controller can turn on before other voltages.
For the 12 VIN converter in Figure 1, the CS5323 UVLO
function monitors the 5.0 V supply. If the 5.0 V supply
comes up before the 12 V supply, the COMP pin will rise
until it reaches the upper rail or until the 12 V supply comes
up and the converter comes into regulation. If the delay
between the 5.0 V and 12 V supplies is too long, soft−start
will be compromised. A diode connected from the 12 V
supply to the COMP pin can hold the COMP pin down until
the 12 V supply starts to come up. Or, if a higher UVLO



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com