PCF85116-3

2048

Rev. 04 — 25 October 2004

Product data

1.

Description

The PCF85116-3 is an 16 kbits (2048

× 8-bit) floating gate Electrically Erasable

Programmable Read Only Memory (EEPROM). By using redundant EEPROM cells it

is fault tolerant to single bit errors. In most cases multi bit errors are also covered.

This feature dramatically increases reliability compared to conventional EEPROM

memories. Power consumption is low due to the full CMOS technology used. The

programming voltage is generated on-chip, using a voltage multiplier.

eight pins is sufficient. Only one PCF85116-3 device is required to support all eight

blocks of 256

× 8-bit each.

Timing of the E/W cycle is carried out internally, thus no external components are

required. A write-protection input at pin 7 (WP) allows disabling of write-commands

from the master by a hardware signal. When pin 7 is HIGH, data in the EEPROM are

protected. The data bytes received will not be acknowledged by the PCF85116-3 and

the EEPROM contents are not changed.

Remark: The PCF85116-3 is pin and address compatible to the PCx85xxC-2 family.

The PCF85116-3 covers the whole address space of 16 kbits; address inputs are no

longer needed. Therefore, pins 1 to 3 are not connected. The write-protection input

(WP) is on pin 7.

2.

Features

µA (at 5.5 V), typical 4 µA

× 8-bit each