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CS5535 датащи(PDF) 112 Page - National Semiconductor (TI) |
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CS5535 датащи(HTML) 112 Page - National Semiconductor (TI) |
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112 / 555 page ![]() www.national.com 112 Revision 0.8 KEL Functional Description (Continued) ms counter can be used (MSR 5140001Fh[3:2]). At the beginning of each frame, the conditions that define asyn- chronous EEs are checked and, if an EE condition exists, the EE is signaled to the host. This has the effect of reduc- ing the number of EEs that are generated for legacy input to no more than 1,000 per second. The number of emula- tion interrupts is limited because the maximum rate of data delivery to an application cannot be more than 1,000 bytes per second. A benefit of this rule is that, for normal key- board and mouse operations, only one EE is required for each data byte sent to the application. Additionally, delay of the EE until the next Start of Frame causes data persis- tence for keyboard input data that is equivalent to that pro- vided by an 8042. 4.9.6 Theory - KEL EEs There are three EEs that produce the signal KEL ASMI. These three EEs are: Character Pending, Input Full, and External IRQ. An A20 sequence is a possible Input Full EE. The A20Sequence bit in the HCE_Control register (KEL Memory Offset 100h[5]) will be set in this case. The signal KEL ASMI is an active high pulse one Local bus clock in width and sent to the Diverse Integration Logic (DIVIL). This signal is only asserted when the EmulationEnable bit in HCE_Control is high (KEL Memory Offset 100h[0] = 1), that is, emulation is enabled. For an EE, KEL also option- ally produces an Emulation IRQ (KEL_EMU_IRQ). This signal is a level and is only asserted when the EE Routing (EER) bit in MSR_KELX_CTL (MSR 5140001Fh[1]) is low. De-asserting KEL_EMU_IRQ requires clearing the appro- priate bit in the HCE_Control or KEL HCE_Status registers (KEL Memory Offset 100h and 10Ch). For the keyboard A20Sequence, KEL sets the KEL_A20_ASMI_FLAG if enabled in the DIVIL. Keyboard INIT and A20 are generated as appropriate when emulation is enabled or snoop is enabled in MSR_KELX_CTL. KEL ASMI is generated as appropriate when emulation is enabled. KEL ASMI is not generated when emulation is disabled and snoop is enabled. Key- board A20 under snoop does not require service beyond the DIVIL GLD_MSR_SMI (MSR 51400002h); that is, KEL does not need to be manipulated. The InputFull bit in HCE_Status (KEL Memory Offset 10Ch[1]) will set, but does not require service. Each new keyboard A20Sequence will set the KEL_INIT_ASMI_FLAG if enabled. If a write to Port A changes the value of bit 1, the KEL sets the PORTA_A20_ASMI_FLAG if enabled in the DIVIL. If bit 0 of Port A is written to a 1, KEL sets the PORTA_INIT_ASMI_FLAG if enabled in the DIVIL. It also sets Port A to the value 2; that is, only bit 1 is high. The A20State bit in HCE_Control (KEL Memory Offset 100h[8]) is not effected. The rate of application software reading of I/O Address 060h is dependent on the alternate device interrupt rate or SOFEVENT (Start of Frame Event, MSR 5140001Fh[3:2]) when the CharacterPending bit is used in the HCE_Control register (KEL Memory Offset 100h[2]). There is one KEL EE per application software read of I/O Address 060h when CharacterPending is set. The rate of application software writing of I/O Addresses 060h and 064h is no greater than SOFEVENT. Generally, there is one KEL EE per application write to I/O Address 060h. SOFEVENT is used to emulate normal delays associated with a real 8042 controller and PS/2 device. Its source is established via MSR 5140001Fh[3:2]. Its value is 1 ms frame interval. 4.9.7 Theory - Mixed Environment A mixed environment is one in which an alternate device and a PS/2 device are supported simultaneously (e.g., a USB keyboard and a PS/2 mouse). The mixed environment is supported by allowing the emulation software to control the PS/2 interface. Control of this interface includes captur- ing I/O accesses to I/O Addresses 060h and 064h and also includes capture of interrupts from the PS/2 keyboard con- troller off the LPC. IRQ1 and IRQ12 from the LPC keyboard controller are routed through the KEL. When External- IRQEn in HCE_Control (KEL Memory Offset 100h[4]) is set, IRQ1 and IRQ12 from the legacy keyboard controller are blocked at the KEL and an ASMI is generated instead. This allows the emulation software to capture data coming from the legacy controller and presents it to the application through the emulated interface. The behavior of IRQ1 and IRQ12 with respect to ExternalIRQEn and IRQEN bits is summarized in Table 4-16. Table 4-16. KEL Mixed Environment Emulation Enable ExternalIRQEn IRQEN LPC_IRQ1 LPC_IRQ12 OutputFull OutputFull Aux IRQ1 Active IRQ12 Active Action 1 0 1 001 0 0 0 IRQ1 1 0 1 000 1 0 0 IRQ12 x 1 0 010 0 0 1 EE x 1 0 100 0 1 0 EE |
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