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CS5535 датащи(PDF) 210 Page - National Semiconductor (TI) |
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CS5535 датащи(HTML) 210 Page - National Semiconductor (TI) |
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210 / 555 page ![]() www.national.com 210 Revision 0.8 GLIU Register Descriptions (Continued) 5.1.4 IOD Descriptor MSRs 5.1.4.1 IOD Base Mask Descriptors (GLIU_IOD_BM[x]) IOD Base Mask 0 (GLIU_IOD_BM0) IOD Base Mask 1 (GLIU_IOD_BM1) IOD Base Mask 2 (GLIU_IOD_BM2) IOD Base Mask 3 (GLIU_IOD_BM3) IOD Base Mask 4 (GLIU_IOD_BM4) IOD Base Mask 5 (GLIU_IOD_BM5) IOD Base Mask 6 (GLIU_IOD_BM6) IOD Base Mask 7 (GLIU_IOD_BM7) IOD Base Mask 8 (GLIU_IOD_BM8) IOD Base Mask 9 (GLIU_IOD_BM9) MSR Address 510100E0h Type R/W Reset Value 60000000_1F0FFFF0h MSR Address 510100E1h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E2h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E3h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E4h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E5h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E6h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E7h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E8h Type R/W Reset Value 000000FF_FFF00000h MSR Address 510100E9h Type R/W Reset Value 000000FF_FFF00000h GLIU_IOD_BM[x] Register Map 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 IDID_BM RSVD IBASE 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 87654321 0 IBASE_BM IMASK_BM GLIU_IOD_BM[x] Bit Descriptions Bit Name Description 63:61 IDID_BM I/O Descriptor Destination ID. These bits define which port to route the request to if it is a hit based on the other settings in this register. 000: Port 0 (GLIU) 100: Port 4 (DD) 001: Port 1 (GLPCI_SB) 101: Port 5 (ACC) 010: Port 2 (USBC2) 110: Port 6 (USBC1) 011: Port 3 (ATAC) 111: Port 7 (GLCP) 60 ICMP_BIZ_BM Compare BIZZARO Flag. 0: Consider only transactions whose BIZZARO flag is low as a potentially valid address hit. A low BIZZARO flag indicates a normal transaction cycle such as a memory or I/O. 1: Consider only transactions whose BIZZARO flag is high as a potentially valid address hit. A high BIZZARO flag indicates a ‘special’ transaction, such as a PCI Shutdown or Halt cycle. |
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