Data Sheet G14309EJ2V0DS00

25

µµµµPC1909

4.5 Duty Settings

4.5.1 Maximum duty setting

In the steady operation state (DTC2 < FB < DTC1), the duty during operation at the FB voltage is determined by OUT1

and OUT2. To set the duty as an independent FB input at times such as at startup, during low voltage input, and when the

current is limited, the OUT1 and OUT2 outputs must be set to their maximum duty values. Set the maximum duty for OUT1

and OUT2 via the DTC1 and DTC2 pins, respectively, as shown in Figure 4-9.

Figure 4-9. Maximum Duty Settings in

µµµµPC1909

VREF

DTC2

DTC1

GND

13

5

3

14

Note that when pulse-by-pulse current limitation is being applied using the OC pin, the maximum duty of OUT1 should be

set to between 60 and 65%. This is because the duty conversion of OUT1 sets the reset level of the internal OC circuit to

about 75%. For details, refer to 4.7 Overcurrent Limiter Settings.

There is no limit to the maximum duty of OUT2.

4.5.2 Minimum duty limit

When OUT1 is operating at maximum duty, if OUT2 is not output, it may inadvertently be set to a duty of 0%, depending

on the value of “OUT1 ON time + tqc + tqd”. If OUT2 has 0% duty when active clamping, the transformer will not be able to

be reset, and a minimum duty limit will have to be set for OUT2 at the same time the maximum duty of OUT1 is

determined. Because the DTC1 pin is also the input of PWM comparator 2 on the OUT2 side, if the FB voltage is higher

than the DTC1 voltage, the DTC1 voltage is compared with dCT and the minimum duty of OUT2 is limited.

4.5.3 Soft start

This IC incorporates a transistor for discharging the soft start capacitor connected between the DCT1 pin and GND. If

VCC falls below the operation stopped voltage (5 V TYP.) or if the ON/OFF pin becomes low level (off), the DTC1 pin

becomes low level and the soft start capacitor is initialized.

There is no such transistor incorporated on the DTC2 side.