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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LPC804 датащи(PDF) 60 Page - NXP Semiconductors |
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LPC804 датащи(HTML) 60 Page - NXP Semiconductors |
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60 / 89 page  LPC804 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2023. All rights reserved. Product data sheet Rev. 2.1 — 25 July 2023 60 of 87 NXP Semiconductors LPC804 32-bit Arm Cortex-M0+ microcontroller 13.8 Wake-up process [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [2] The wake-up time measured is the time between when a GPIO input pin is triggered to wake the device up from the low power modes and from when a GPIO output pin is set in the interrupt service routine (ISR) wake-up handler. ISR is located in SRAM. [3] FRO enabled, all peripherals off. [4] Wake up from deep power-down causes the part to go through entire reset process. The wake-up time measured is the time between when the Wake-Up pin is triggered to wake the device up and when a GPIO output pin is set in the reset handler. Table 23. Dynamic characteristic: Typical wake-up times from low power modes VDD = 3.3 V;Tamb = 25 C; Using FRO (15 MHz) as the system clock. Symbol Parameter Conditions Min Typ[1] Max Unit twake wake-up time from sleep mode [2][3] - 1.97 - s from deep-sleep mode [2] - 2.07 - s from power-down mode [2] - 25 - s from deep power-down mode [4] - 313 - s |
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