LPC804 datasheet(35/89 Pages) NXP

35 / 89 page

LPC804

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Product data sheet

Rev. 2.1 — 25 July 2023

35 of 87

NXP Semiconductors

LPC804

32-bit Arm Cortex-M0+ microcontroller

9.25.5 Wake-up process

The LPC804 begin operation at power-up by using the FRO as the clock source allowing

chip operation to resume quickly. If LPOsc or external clock sources are needed by the

application, software must enable these features and wait for them to stabilize before they

are used as a clock source.

9.26 System control

9.26.1 Reset

Reset has four sources on the LPC804: the RESET pin, the Watchdog reset, power-on

reset (POR), and the BrownOut Detection (BOD) circuit. The RESET pin is a Schmitt

trigger input pin. Assertion of chip reset by any source, once the operating voltage attains

a usable level, starts the FRO and initializes the flash controller.

Table 8.

Wake-up sources for reduced power modes

power mode

Wake-up source

Conditions

Sleep

Any interrupt

Enable interrupt in NVIC.

Deep-sleep and

power-down

Pin interrupts

Enable pin interrupts in NVIC and STARTERP0 registers.

BOD interrupt

• Enable interrupt in NVIC and STARTERP1 registers.

• Enable interrupt in BODCTRL register.

• BOD powered in PDSLEEPCFG register.

BOD reset

• Enable reset in BODCTRL register.

• BOD powered in PDSLEEPCFG register.

WWDT interrupt

• Enable interrupt in NVIC and STARTERP1 registers.

• WWDT running. Enable WWDT in WWDT MOD register and feed.

• Enable interrupt in WWDT MOD register.

• LPOsc powered in PDSLEEPCFG register.

WWDT reset

• WWDT running.

• Enable reset in WWDT MOD register.

• LPOsc powered in PDSLEEPCFG register.

Self-Wake-up Timer

(WKT) time-out

• Enable interrupt in NVIC and STARTERP1 registers.

• Enable low-power oscillator in the LPOSCCLKEN register in the SYSCON

block.

• Select low-power clock for WKT clock in the WKT CTRL register.

• Start the WKT by writing a time-out value to the WKT COUNT register.

Interrupt from

USART/SPI/I2C

peripheral

• Enable interrupt in NVIC and STARTERP1 registers.

• Enable USART/I2C/SPI interrupts.

• Provide an external clock signal to the peripheral.

• Configure the USART in synchronous slave mode and I2C and SPI in

slave mode.

Interrupt from

Capacitive Touch

peripheral

• Enable interrupt in NVIC and STARTERP1 registers.

• Enable the Capacitive Touch interrupt.

• Switch FCLK clock source to the LPOsc.

• Set Capacitive Touch registers.

• Provide a touch event to the peripheral.

Deep power-down WAKEUP pins

Enable the WAKEUP function in the WUENAREG register in the PMU.

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