AD8385ASVZ datasheet(3/24 Pages) AD

3 / 24 page

AD8385

Rev. 0 | Page 3 of 24

SPECIFICATIONS

DECDRIVER SECTION

@ 25°C, AVCC = 15.5 V, DVCC = 3.3 V, TA MIN = 0°C, TA MAX = 85°C, VRH = 9.5 V, VRL = V1 = V2 = 7 V, unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ

Max

Unit

VIDEO DC PERFORMANCE1

TMIN to TMAX

VDE

DAC Code 450 to 800

–7.5

+7.5

VCME

DAC Code 450 to 800

–3.5

+3.5

VIDEO OUTPUT DYNAMIC PERFORMANCE

TMIN to TMAX , VO = 5 V step, CL = 150 pF

Data Switching Slew Rate

20% to 80%

460

V/µs

Invert Switching Slew Rate

20% to 80%

560

V/µs

Data Switching Settling Time to 1%

Data Switching Settling Time to 0.25%

Invert Switching Settling Time to 1%

120

Invert Switching Settling Time to 0.25%

250

500

Invert Switching Overshoot

100

200

CLK and Data Feedthrough2

mV p-p

All-Hostile Crosstalk3

Amplitude

mV p-p

Glitch Duration

DAC Transition Glitch Energy

DAC Code 511 to 512

0.3

nV-s

VIDEO OUTPUT CHARACTERISTICS

Output Voltage Swing

AVCC – VOH, VOL – AGND

1.1

1.3

Output Voltage—Grounded Mode

0.25

Data Switching Delay: t94

50 % of VIDx

INV Switching Delay: t105

50 % of VIDx

INV to CLK Setup Time: t27

0.5 fCLK

5.5 fCLK

Output Current

100

Output Resistance

Ω

REFERENCE INPUTS

V1 Range

≥ (V1 – 0.25 V)

AVCC – 4

V2 Range

≥ (V1 – 0.25 V)

AVCC – 4

V1 Input Current

–5

µA

V2 Input Current

–27

µA

VRL Range

VRH ≥ VRL

V1 – 0.5

AVCC – 1.3

VRH Range

VRH ≥ VRL

VRL

AVCC

VRH to VRL Range

VFS =2 × (VRH – VRL)

2.75

VRH Input Resistance

To VRL

kΩ

VRL Bias Current

–0.2

µA

VRH Input Current

125

µA

RESOLUTION

Coding

Binary

Bits

AD8385ASVZ датащи(PDF) 3 Page - Analog Devices

AD8385ASVZ датащи(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL