AD8385ASVZ datasheet(16/24 Pages) AD

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AD8385

Rev. 0 | Page 16 of 24

FUNCTIONAL DESCRIPTION

The AD8385 is a system building block designed to directly

drive the columns of LCD microdisplays of the type popu-

larized for use in projection systems. It comprises 12 channels

of precision, 10-bit digital-to-analog converters loaded from a

single, high speed, 10-bit wide input. Precision current feedback

amplifiers, providing well-damped pulse response and fast

voltage settling into large capacitive loads, buffer the 12 outputs.

Laser trimming at the wafer level ensures low absolute output

errors and tight channel-to-channel matching. Tight part-to-

part matching in high resolution systems is guaranteed by the

use of external voltage references.

Three groups of level shifters convert digital inputs to high

voltage outputs for direct connection to the control inputs of

LCD panels.

An edge detector conditions a high voltage reference timing

input from the LCD and converts it to digital levels for use in

synchronizing timing controllers, such as the AD8389.

REFERENCE AND CONTROL INPUT

Start Sequence Control—Input Data Loading

A valid STSQ control input initiates a new 6-clock loading cycle

during which 12 input data-words are loaded sequentially into

12 internal channels. Data is loaded on both the rising and

falling edges of CLK. A new loading sequence begins on the

current rising CLK edge only when STSQ is held high at the

preceding rising CLK edge.

Right/Left Control—Input Data Loading

To facilitate image mirroring, the direction of the loading

sequence is set by the R/L control.

A new loading sequence begins at Channel 0 and proceeds to

Channel 11 when the R/L control is held low. It begins at

Channel 11 and proceeds to Channel 0 when the R/L control

is held high.

XFR Control—Data Transfer to Outputs

Data transfer to the outputs is initiated by the XFR control. Data

is transferred to all outputs simultaneously on the rising CLK

edge only when XFR is high during the preceding rising

CLK edge.

V1, V2 Inputs—Voltage Reference Inputs

Two external analog voltage references set the levels of the

outputs. V1 sets the output voltage at Code 1023 while the INV

input is low, and V2 sets the output voltage at Code 1023 while

the INV input is held high.

VRH, VRL Inputs—Full-Scale Video Reference Inputs

Twice the difference between these analog input voltages sets

the full-scale output voltage VFS = 2 (VRH–VRL).

INV Control—Analog Output Inversion

The analog voltage equivalent of the input code is subtracted

from (V2 + VFS) while INV is held high and added to

(V1 – VFS) while INV is held low. Video inversion is delayed

by 6 to 12 CLK cycles from the INV input.

TSTM Control—Test Mode

A low on this input allows serial interface control of the output

operating mode and the thermal switch.

A high on this input turns the thermal switch on and releases

the video outputs and VAO1 from grounded mode.

3-Wire Serial Interface—SDAC, Output, Thermal Switch

Control

The serial interface controls two 8-bit serial DACs, the thermal

switch of the overload protection circuit, and the video output

operating mode via a 12-bit-wide serial word from a micropro-

cessor. Four of the 12 bits select the function; the remaining

8 bits are the data for the serial DACs.

Table 13. Bit Definitions

Bit

Name

Bit Functionality

SD(0:7)

8-bit SDAC data. MSB = SD7

SD8

Not used

SD9

Thermal switch control

SD10

Output operating mode, SDAC selection, and

thermal switch control

SD11

Output operating mode and SDAC selection control

Table 14. Truth Table @ TSTM = Low

SEN

Action

Load VAO2. No change to VAO1.

Load VAO1. Release video outputs

from grounded mode. No change to

VAO2.

Release video outputs and VAO1 from

grounded mode. Disable thermal

switch. No change to VAO1 and

VAO2.

Release video outputs and VAO1 from

grounded mode. Enable thermal

switch. No change to VAO1 and

VAO2.

Video outputs and VAO1 to grounded

output mode. Disable thermal switch.

No change to VAO1, VAO2.

Video outputs and VAO1 to grounded

output mode. Enable thermal switch.

No change to VAO1, VAO2.

Start a serial interface loading cycle.

No change to outputs.

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