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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD8385ASVZ датащи(PDF) 22 Page - Analog Devices |
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AD8385ASVZ датащи(HTML) 22 Page - Analog Devices |
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22 / 24 page  AD8385 Rev. 0 | Page 22 of 24 16 mm 6.5 mm AD8385 PCB DESIGN RECOMMENDATIONS Top PCB Layer • Pad size: 0.25 mm × 0.25 mm • Pad pitch: 0.5 mm • Thermal pad size: 6.5 mm × 6.5 mm • Thermal via structure: 0.25 mm diameter vias on a 0.5 mm grid Bottom PCB Layer It is recommended that the bottom thermal pad be thermally connected to a plane. The connection should be direct such that the thermal pad becomes part of the plane. Figure 22. Land Pattern—Top Layer The use of thermal spokes is not recommended when con- necting the thermal pads or via structure to the AVCC plane. 6.5 mm Solder Masking To minimize the formation of solder voids due to solder flowing into the via holes (solder wicking), the via diameter should be small. Optional solder masking of the via holes on the top layer of the PCB plugs the via holes, inhibiting solder flow into the holes. To optimize the thermal pad coverage, the solder mask diameter should be no more than 0.1 mm larger than the via hole diameter. Solder Mask—Top Layer • Pads: Set by the customer’s PCB design rules • Thermal vias: 0.25 mm diameter circular mask, centered on the vias. Figure 23. Land Pattern—Bottom Layer Solder Mask—Bottom Layer Set by the customer’s PCB design rules. Figure 24. Solder Mask—Top Layer |
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