1997 Jun 20

3

Philips Semiconductors

Product specification

P-channel enhancement mode

vertical D-MOS transistor

BSP250

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. Pulse width and duty cycle limited by maximum junction temperature.

2. Device mounted on an epoxy printed-circuit board, 40

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

drain-source voltage (DC)

−−30

V

gate-source voltage (DC)

open drain

−±20

V

drain current (DC)

−−3A

peak drain current

note 1

−−12

A

total power dissipation

−

5W

−

1.65

W

storage temperature

−65

+150

°C

operating junction temperature

−

150

°C

Source-drain diode

source current (DC)

−−1.5

A

peak pulsed source current

note 1

−−6A

Fig.2 Power derating curve.

handbook, halfpage

0

200

2.0

0

0.4

0.8

1.2

1.6

MLB885

Tamb (°C)

50

100

150

Ptot

(W)

δ = 0.01.

Fig.3 SOAR.

handbook, halfpage

MLB835

VDS (V)

ID

(A)

−1

−10

−1

−10

tp

tp

T

P

t

T

1 ms

DC

(1)

tp =

10

µs