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74LVC2G00DP датащи(PDF) 7 Page - Nexperia B.V. All rights reserved |
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74LVC2G00DP датащи(HTML) 7 Page - Nexperia B.V. All rights reserved |
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7 / 20 page ![]() Nexperia 74LVC2G00 Dual 2-input NAND gate 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground 0 V); for test circuit see Fig. 9. Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Symbol Parameter Conditions Min Typ[1] Max Min Max Unit nA, nB to nY; see Fig. 8 [2] VCC = 1.65 V to 1.95 V 1.2 3.5 8.6 1.2 10.8 ns VCC = 2.3 V to 2.7 V 0.7 2.3 4.8 0.7 6.0 ns VCC = 2.7 V 0.7 3.0 5.6 0.7 7.0 ns VCC = 3.0 V to 3.6 V 0.7 2.2 4.3 0.7 5.4 ns tpd propagation delay VCC = 4.5 V to 5.5 V 0.5 1.8 3.3 0.5 4.2 ns CPD power dissipation capacitance per gate; VI = GND to VCC [3] - 14 - - - pF [1] Typical values are measured at nominal VCC and at Tamb = 25 °C. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC 2 × fi × N + ∑(CL × VCC 2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC 2 × fo) = sum of outputs. 74LVC2G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 16 — 20 June 2022 7 / 20 |
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