CS5305GDWR28 datasheet(28/33 Pages) ONSEMI

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CS5305

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Figure 47.

PHASE 1 SWITCH NODE

PHASE 2 SWITCH NODE

PHASE 3 SWITCH NODE

SUPERIMPOSED PHASE

INDUCTOR CURRENTS

PHASE 1 CURRENT

PHASE 2 CURRENT

PHASE 3 CURRENT

OUTPUT RIPPLE CURRENT

Finally, we should consider power dissipation in the

output inductors. Power dissipation is proportional to the

square of inductor current:

PD + I2PHASE)(ESRL)

The temperature rise of the inductor relative to the air

surrounding it is defined as the product of power dissipation

and thermal resistance to ambient:

DT(inductor) + (Ra)(PD)

Ra for an inductor designed to conduct 20 A to 30 A is

approximately 45°C/W. The inductor temperature is given as:

T(inductor) + DT(inductor) ) Tambient

Output Filter Capacitors

Each microprocessor manufacturer specifies output filter

capacitors for the motherboards. In addition, the designer

may need to add some output capacitance on the VRM

module. These added output capacitors would serve to

reduce the noise floor and help ensure jitter−free operation.

If needed, one or two ceramic capacitors should be

sufficient. They should have a 4 WVDC rating. Large

amounts of bulk capacitance placed on the VRM module are

not useful, since the impedance of the VRM connector exists

between the module and the load. Low equivalent series

resistance is important since output ripple voltage and

response to output current transients are largely dependent

on this parasitic parameter.

VCC Bypass Filtering

A small RC filter should be added between module VCC and

the VCC input to the CS5305. A 10 Ω resistor and a 0.1 μF

capacitor should be sufficient to ensure the controller IC does

not operate erratically due to injected noise.

Module Input Filter Capacitors

The input filter capacitors for the VRM module provide

a charge reservoir that minimizes supply voltage variations

due to changes in current flowing through the switch FETs.

These capacitors must be chosen primarily for ripple current

rating.

Figure 48.

VIN

VOUT

IIN(AVE)

IRMS(CIN)

CIN

CONTROL

INPUT

LIN

LOUT

COUT

Consider the schematic shown in Figure 48. The average

current flowing in the input inductor LIN for any given

output current is:

IIN(AVE) + (IOUT)(VOUT VIN)

+ (IOUT per phase)(n)(D)

where:

D = duty cycle,

n = number of phases.

Input capacitor current is positive into the capacitor when

the switch FETs are off, and negative out of the capacitor

when the switch FETs are on. When the switches are off,

IIN(AVE) flows into the capacitor. When the switches are on,

capacitor current is equal to the per−phase output current

minus IIN(AVE). If we ignore the small current variation due

to the output ripple current, we can approximate the input

capacitor current waveform as a square wave. We can then

calculate the RMS input capacitor ripple current:

IRMS(CIN) +

IN(AVE) ) D

IOUT per phase * IIN(AVE) 2 * I2IN(AVE)

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