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CS5305GDWR28 датащи(PDF) 17 Page - ON Semiconductor |
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CS5305GDWR28 датащи(HTML) 17 Page - ON Semiconductor |
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17 / 33 page ![]() CS5305 http://onsemi.com 17 will decay with the time constant (Rcsx)(Ccsx). The VDRP voltage will also overshoot and response will be slowed, since the current signal is a component of that voltage. The single phase current limit will trip earlier since the current signal appears larger than it should be, and the module current limit will have a lower threshold for fast transients than it will for slow transients. Additional external components in the droop circuit and in the error amp compensation will correct this condition. Details are provided in the data sheet section on choosing external components. Adaptive Voltage Positioning Adaptive voltage positioning is a technique used to reduce peak−to−peak output deviations during output current transients. The output voltage is set higher than nominal at light loads to reduce output voltage sag when load current is suddenly increased. Similarly, output voltage is set lower than nominal at heavy loads to reduce overshoot when load current suddenly decreases. The CS5305 implements adaptive voltage positioning by placing a resistor divider between VDRP and VOUT. The center tap of the divider connects to VFB. These resistors, along with two or three other external components, implement a lossless droop voltage function. Past implementations of adaptive voltage positioning used a droop resistor. This resistor was placed in series between the regulation point of the output voltage and the load. Increasing the current to the load caused the voltage at the load to droop below the regulation point. The amount of droop was equal to the change in current multiplied by the droop resistor value. This method was acceptable for low values of output current, where the droop resistor provided a minimal change in voltage without dissipating a great deal of power. Higher output current levels and tighter droop voltage requirements in today’s microprocessors have rendered this droop resistor technique unusable. The lossless technique solves these problems. The AVP function addresses DC and slow transient output voltage positioning. Response during the first few hundreds of nanoseconds of a transient are addressed primarily by the power stage output impedance, and the ESR and ESL of the output filter. The ramp size and the error amplifier compensation control the transition between these two regions. If ramp size is too large or the error amp is too slow, there will be a long transition to the final voltage after a transient. This will be most apparent if the output capacitance is low. Figure 28 shows how adaptive positioning works. The waveform labeled “normal” shows output voltage for a converter without adaptive voltage positioning. The voltage sags when current steps up, returns to its nominal value and then overshoots when the current load is decreased. Using a slow adaptive positioning circuit can actually worsen performance. The slow adaptive positioning waveform above shows the output voltage sag, but the voltage recovers to its initial value before the adaptive positioning circuit becomes active. When the load decreases, the overshoot causes the output voltage to exceed the upper limit. The fast adaptive positioning waveform shows how AVP can reduce transient voltage requirements by about one half compared to a “normal” converter. Adaptive Positioning Adaptive Positioning Normal Fast Slow Limits Figure 28. Adaptive Positioning Current Limit The CS5305 features two separate current limit circuits. First, the per−phase current limit terminates topside switch conduction in a phase if the voltage between any CSx pin and CSREF exceeds a typical value of 90 mV. This provides fast peak current protection for individual phases. In addition, the output current signals for all three phases are summed and filtered to provide an average module current signal. This signal is compared to a voltage that is user−programmable. If this voltage is exceeded, the fault latch is set and the COMP capacitor is discharged by a 5 μA current sink until the COMP voltage falls below 0.2 V. The soft−start cycle begins when this threshold is reached, and the converter will operate in hiccup−mode until the overcurrent condition is cleared. Error Amplifier The CS5305 uses the Enhanced V2 control method to offer the fastest and most accurate regulation available. One of the features of this control method is ease of error amplifier compensation. A single capacitor placed from the COMP pin to ground is sufficient to adequately stabilize the error amplifier. |
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