MMPF0100Z datasheet(63/128 Pages) NXP

63 / 128 page

NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.4.5.5

SW3A/B external components

Table 74. Register SW3BMODE - ADDR 0x46

Name

Bit #

R/W

Default

Description

SW3BMODE

3:0

R/W

0x80

Sets the SW3B (Independent) switching

operation mode. See Table 29 for all possible

configurations.

UNUSED

–

0x00

unused

SW3BOMODE

R/W

0x00

Set status of SW3B (Independent) when in sleep

mode.

0 = OFF

1 = PFM

UNUSED

7:6

–

0x00

unused

Table 75. Register SW3BCONF - ADDR 0x47

Name

Bit #

R/W

Default

Description

SW3BILIM

R/W

0x00

SW3B current limit level selection

0 = High level current limit

1 = Low level current limit

UNUSED

R/W

0x00

unused

SW3BFREQ

3:2

R/W

0x00

SW3B switching frequency selector. See Table 37.

SW3BPHASE

5:4

R/W

0x00

SW3B phase clock selection. See Table 35.

SW3BDVSSPEED

7:6

R/W

0x00

SW3B DVS speed selection. See Table 34.

Table 76. SW3A/B external component requirements

Mode

Components

Description

SW3A/B single

phase

SW3A/B dual

phase

SW3A independent

SW3B independent

CINSW3A(51)

SW3A input capacitor

4.7

F4.7 F4.7 F

CIN3AHF(51)

SW3A decoupling input capacitor

0.1

F0.1 F0.1 F

CINSW3B(51)

SW3B input capacitor

4.7

F4.7 F4.7 F

CIN3BHF(51)

SW3B decoupling input capacitor

0.1

F0.1 F0.1 F

COSW3A(51)

SW3A output capacitor

4 x 22

F2 x 22 F2 x 22 F

COSW3B(51)

SW3B output capacitor

–

2 x 22

F2 x 22 F

LSW3A

SW3A inductor

1.0

H

DCR = 50 m



ISAT = 3.9 A

1.0

H

DCR = 60 m



ISAT = 3.0 A

1.0

H

DCR = 60 m



ISAT = 3.0 A

LSW3B

SW3B inductor

–

1.0

H

DCR = 60 m



ISAT = 3.0 A

1.0

H

DCR = 60 m



ISAT = 3.0 A

Notes

51.

Use X5R or X7R capacitors.

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