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SN250 датащи(PDF) 117 Page - STMicroelectronics |
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SN250 датащи(HTML) 117 Page - STMicroelectronics |
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117 / 130 page ![]() SN250 SIF module programming and debug interface 117/130 8 SIF module programming and debug interface SIF is a synchronous serial interface developed by Cambridge Consultants Ltd. It is the primary programming and debug interface of the SN250. Therefore, any design implementing the SN250 should make the SIF signals readily available. The SIF module allows external devices to read and write memory-mapped registers in real-time without changing the functionality or timing of the XAP2b core. See the SN250 Reference Design for details regarding the implementation of the SIF interface. The SIF interface provides the following: ● IC production test (especially analog) ● PCB production test ● XAP2b code development ● Product control and characterization The pins are: ● nSIF_LOAD ● SIF_CLK ● SIF_MOSI ● SIF_MISO Because the SIF module directly connects to the program and data memory buses within the SN250, it has access to the entire Flash and RAM blocks, as well as the on-chip registers. The maximum serial shift speed for the SIF interface is 48MHz. SIF interface accesses can be initiated even when the chip is in idle and deep sleep modes. An edge on nSIF_LOAD wakes the chip to allow SIF cycles. |
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