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MPZ2012S221A датащи(PDF) 34 Page - STMicroelectronics |
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MPZ2012S221A датащи(HTML) 34 Page - STMicroelectronics |
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34 / 56 page ![]() 9.4 Output External synchronization The device allows a direct connection between a clock source and the EN/CLKIN pin. Figure 41. External synchronization (direct connection) VIN VIN EN/CLKIN AGND AGND EP VIN GND L6983I FSW RFSW1 VPP The device internally implements a low-pass filter connected to the EN/CLKIN pin that is able to acquire the average value of the applied signal. The device turns on when the average of the signal applied is higher than VEN rising (refer toTable 6. Electrical characteristics). The device turns off when the average of the signal should be lower than VEN falling (refer to Table 6. Electrical characteristics). Considering, for example, a clock source with VPP = 5.0 V, the minimum duty cycle to guarantee the power-up is given by: Dutymin=VEN,Rising VPP =0.24 (29) The maximum duty cycle to guarantee the turn-off is given by: DutyMAX=VEN,Falling VPP =0.2 (30) The device also allows the AC coupling. L6983I Output External synchronization DS14040 - Rev 1 page 34/56 |
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