UPD301ASLASHKYX datasheet(11/40 Pages) MICROCHIP

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 2018-2019 Microchip Technology Inc.

DS00002838B-page 11

UPD301A

3.2

Pin Descriptions

This sections details the functions of the various device signals.

TABLE 3-2:

PIN DESCRIPTIONS

Name

Symbol

Buffer

Type

Description

USB Type-C™

Configuration

Channel 1

CC1

AIO

Configuration Channel (CC) used in the discovery, configu-

ration and management of connections across a USB

Type-C cable.

Configuration

Channel 2

CC2

AIO

Configuration Channel (CC) used in the discovery, configu-

ration and management of connections across a USB

Type-C cable.

VBUS

Detection

VBUS_DET_IN

AIO

Scaled down version of VBUS input used for VBUS detec-

tion. Tie this signal to VBUS via a resistor divider.

SPI Interface

SPI Clock

SPI_CLK

SPI clock.

The maximum supported SPI clock frequency is 8 MHz.

SPI Data

Master In /

Slave Out

SPI_MISO

I/O8

SPI data master in, slave out.

SPI Data

Master Out /

Slave In

SPI_MOSI

SPI data master out / slave in. This pin must be connected

to SPI_MOSI_SI for proper operation.

SPI Data

Slave In

SPI_MOSI_SI

SPI data slave in. This pin must be connected to SPI_MOSI

for proper operation.

SPI Chip

Enable

SPI_SS

Active low SPI chip enable input for optional external

UPD350.

SPI Interrupt

SPI_IRQ_N

SPI interrupt indicating request for service from optional

external UPD350.

DC/DC Control

DAC Output

(Source)

DAC_DC

In the Source Role, this DAC output is used to control the

DC/DC converter output voltage.

Miscellaneous

VBUS Load

Switch Enable

EN_VBUS

When asserted, closes the VBUS load switch. Only valid in

the Attach.SRC state.

VBUS

Discharge

VBUS_DIS

When asserted, enables external current sink in order to

discharge VBUS.

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