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EFP01 датащи(PDF) 37 Page - Silicon Laboratories |
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EFP01 датащи(HTML) 37 Page - Silicon Laboratories |
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37 / 158 page ![]() 5.1.1 Absolute Maximum Ratings Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and relia- bility data, see the Quality and Reliability Monitor Report at https://www.silabs.com/about-us/corporate-responsibility/commitment-to- quality. Table 5.1. Absolute Maximum Ratings Parameter Symbol Test Condition Min Typ Max Unit Storage temperature range TSTG -50 — 150 °C DC voltage on input supply pins VDDA1 VVDDA -0.3 — 2.0 V DC voltage on input supply pins VDDB1 VVDDB_DC -0.3 — 5.5 V Transient voltage on input supply pin VDDB1 VVDDB_TRN t < 30 µs, duty cycle < 0.01% — — 6.5 V DC voltage connected through inductor to LA2 pin in boost configurations.1 VVBOOST -0.3 — 5.5 V Voltage on output supply pins: VOA, VOB, VOC, VOA_SW VOUT -0.3 — 5.5 V DC voltage on VIO supply pin VVIO -0.3 — 5.5 V DC voltage on any I/O pin VDIGPIN -0.3 — VVIO+0.3 V On-chip power dissipation2 PDIS 2-layer PCB, THETAJA = 81.2 °C/W, TAMBIENT = 25 °C — — 923 mW 4-layer PCB, THETAJA = 66.0 °C/W, TAMBIENT = 25 °C — — 1136 mW Operating Junction tempera- ture TJ -G grade devices -40 — 105 °C Note: 1. Note that there is no reverse battery insertion protection implemented on-chip. Applications that may be susceptible to a reverse battery insertion should incorporate external protection circuitry. 2. Max on-chip power dissipation is given by: PMAX = (100 °C - TAMBIENT) / THETAJA EFP01 Energy Friendly PMIC Family Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.3 | 37 |
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