EM6682TP8B datasheet(21/61 Pages) EMMICRO

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EM6682

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7. Serial Port

The EM6682 contains a simple, half duplex three wire synchronous type serial interface., which can be used to program or

read an external EEPROM, ADC, ... etc. Its I/O are multiplexed on Port A.

For data reception, a shift-register converts the serial input data on the SIN(PA[0]) terminal to a parallel format, which is

subsequently read by the CPU in registers RegSDataL and RegSDataH for low and high nibble. To transmit data, the CPU

loads data into the shift register, which then serializes it on the SOUT(PA[2]) terminal. It is possible for the shift register to

simultaneously shift data out on the SOUT terminal and shift data on the SIN terminal. In Master mode, the shifting clock is

supplied internally by the Prescaler : one of three prescaler frequencies are available, Ck[16] or external clock (metal option to

select between, Ck[15] or Ck[14]. In Slave mode, the shifting clock is supplied externally on the SCLKIn(PA[1]) terminal. In

either mode, it is possible to program : the shifting edge, shift MSB first or LSB first and direct shift output. All these selection

are done in register RegSCntl1 and RegSCntl2.

Figure 14. Serial Interface Architecture

The PA[3..0] terminal configuration is shown in Figure 10 and 12. When the Serial Interface is used then care should be taken

not to use inputs and outputs needed for Serial Interface for other peripherals !:

∗ PA[0] {SIN} must be dedicated to Serial input if needed and can not be used for IRQ, Software Variable jumps or Output. It

can be still used for Wake-Up on Change

∗ PA[1] {SCLK} is an output for Master mode {SCLKOut} and an input for Slave mode {SCLKIn}. But different functions can

be Switched On/Off with care as they are needed.

∗ PA[2] {SOUT} must be dedicated to Serial Data Output if needed and can not be used for Analogue input, or other Output.

∗ PA[3] {CS / Ready} if used for serial Interface status output. When used for Serial Interface it can not be used for IRQ,

Software Variable jumps or Output. It can be still used for Wake-Up on Change.

Note:

Before using the serial interface, the corresponding circuit terminals must be configured accordingly.

Control Logic

Mux

Internal Master Clock

Source (ck[16,15,14])

External Slave Clock Source

(SCLKin from SCLK PA[1]

Control

Status Registers

Mode

8-bit Shift Register

IRQSerial

Serial Master Clock Output

SCLKout to SCLK PA[1]

Status to

CS/Ready PA[3]

Shift Ck

Shift complete

(8th Shift Clock)

Write Tx Read Tx

Clock

Enable

Serial Input Data

from SIN PA[0]

MSB;LSB

First

Direct

Shift

Start

ResetStart

Status

Serial Output Data to

SOUT PA[2]

Status

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