EM6682TP8B datasheet(13/61 Pages) EMMICRO

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EM6682

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5.3 Prescaler

The prescaler consists of a fifteen elements divider chain which delivers clock signals for the peripheral circuits such as

timer/counter, debouncer and edge detectors, as well as generating prescaler interrupts. The input to the prescaler is the

system clock signal closest to 32 kHz or 50 kHz which comes from the RC oscillator or external clock as divided by the

preceding divider. Power on initializes the prescaler to Hex(0001).

Table 5.3.1 Prescaler Clock Name Definition

Function

Name

32 KHz

SysClk

50 KHz

SysClk

Function

Name

32 KHz

SysClk

50 KHz

SysClk

System clock

Ck[16]

32768 Hz

50000 Hz

System clock / 256

Ck[8]

128 Hz

195 Hz

System clock / 2

Ck[15]

16384 Hz

25000 Hz

System clock / 512

Ck[7]

64 Hz

97 Hz

System clock / 4

Ck[14]

8192 Hz

12500 Hz

System clock / 1024

Ck[6]

32 Hz

49 Hz

System clock / 8

Ck[13]

4096 Hz

6250 Hz

System clock / 2048

Ck[5]

16 Hz

24 Hz

System clock/ 16

Ck[12]

2048 Hz

3125 Hz

System clock / 4096

Ck[4]

8 Hz

12 Hz

System clock / 32

Ck[11]

1024 Hz

1562 Hz

System clock / 8192

Ck[3]

4 Hz

6 Hz

System clock / 64

Ck[10]

512 Hz

781 Hz

System clock / 16384

Ck[2]

2 Hz

3 Hz

System clock / 128

ck [9]

256 Hz

390 Hz

System clock / 32768

Ck[1]

1 Hz

1.5 Hz

Figure 9. Prescaler Frequency Timing

Prescaler Reset

SysClk = System clock Ck[16]

Ck[15]

Ck[14]

Ck[13]

Ck[2]

Ck[1]

Horizontal Scale change

First positive edge of 1 Hz clock Ck[1] is 1 sec after the falling reset edge

Table 5.3.2 Control of Prescaler Register RegPresc

Bit

Name

Reset

R/W

Description

ExtCPUclkON

R/W

Ext. Clock selection instead of RCosc.

ResPresc

R/W

Write Reset prescaler

Reset the divider chain from Ck[14] to Ck[2], sets Ck[1]. 0

No action.

The Read value is always '0'

PrIntSel

R/W

Interrupt select. 0

Interrupt from Ck[4] (typ. 8/12 Hz)

Interrupt from Ck[7] (typ. 64/97 Hz)

DebSel

R/W

Debounce clock select. 0

Debouncer with Ck[8]

Debouncer with Ck[11] or Ck[14]

With DebSel = 1 one may choose either the Ck[11] or Ck[14] debouncer frequency by selecting the corresponding metal mask

option or by register RegMFP0 Opt[3] when this register is at ‘1’, the debouncer use Ck[14]. Relative to 32kHz the

corresponding max. debouncer times are then 2 ms or 0.25 ms. For the metal mask selection refer to chapter

98H98H

14.1.3

Switching the PrIntSel may generate an interrupt request. Avoid it with MaskIRQ64/8 = 0 selection during the switching

operation.

The prescaler contains 2 interrupt sources:

- IRQ64/8 ; this is Ck[7] or Ck[4] positive edge interrupt, the selection is depending on bit PrIntSel.

- IRQHz1 ; this is Ck[1] positive edge interrupt

There is no interrupt generation on reset.

The first IRQHz1 Interrupt occurs typ. 1 sec (if SysClk = 32kHz) after reset. (0.65 sec if SysClk is 50kHz).

NOTE: If not written explicitly all timing in peripherals is calculated for 32 kHz System Clock !

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