LM5145 datasheet(3/70 Pages) TI

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6 Pin Configuration and Functions

CNFG

EXTCOMP

AGND

VDDA

VCC

PGND

CBOOT

VCCX

PG/SYNCOUT

PFM/SYNC

ISNS+

VOUT

Exposed

Pad

(EP)

Connect the exposed pad to AGND and PGND on the PCB.

Figure 6-1. 24-Pin VQFN RGY Package (Top View)

Table 6-1. Pin Functions

I/O(1)

DESCRIPTION

NO.

NAME

̶̶

Connect to GND at the exposed pad to improve heat spreading.

̶̶

Connect to GND at the exposed pad to improve heat spreading.

CNFG

Connect a resistor to ground to set primary/secondary, spread spectrum enable/disable, or interleaved

operation.

Frequency programming pin. A resistor from RT to AGND sets the oscillator frequency between 100 kHz

and 2.2 MHz.

EXTCOMP

Transconductance error amplifier output. If used, connect the compensation network from EXTCOMP to

AGND.

Connect FB to VDDA to set the output voltage to 3.3 V. Connect FB using a 24.9 kΩ or 49.9 kΩ to VDDA

to set the output voltage to 5 V or 12 V, respectively. Install a resistor divider from VOUT to AGND to set

the output voltage setpoint between 0.8 V and 55 V. The FB regulation voltage is 0.8 V.

AGND

Analog ground connection. Ground return for the internal voltage reference and analog circuits

VDDA

Internal analog bias regulator. Connect a ceramic decoupling capacitor from VDDA to AGND.

VCC

VCC bias supply pin. Connect a ceramic capacitor between VCC and PGND.

PGND

Power ground connection pin for low-side MOSFET gate driver

Low-side power MOSFET gate driver output

VIN

Supply voltage input source for the VCC regulator

High-side power MOSFET gate driver output

Switching node of the buck regulator and high-side gate driver return. Connect to the bootstrap capacitor,

the source terminal of the high-side MOSFET, and the drain terminal of the low-side MOSFET.

CBOOT

High-side driver supply for bootstrap gate drive

VCCX

Optional input for an external bias supply. If VVCCX > 4.3 V, VCCX is internally connected to VCC and the

internal VCC regulator is disabled.

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LM5148

SNVSC01 – FEBRUARY 2023

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