LM5145 datasheet(17/70 Pages) TI

17 / 70 page

below the VCC UVLO falling threshold of 3.1 V (typical) or EN is switched to a low state. Connect a ceramic

capacitor from VCC to PGND. The recommended range of the VCC capacitor is from 2.2 µF to 10 µF.

An internal 5-V linear regulator generates the VDDA bias supply. Bypass VDDA with a 100-nF or higher ceramic

capacitor to achieve a low-noise internal bias rail. Normally, VDDA is 5 V. However, there is one condition where

VDDA regulates at 3.3 V. This is in PFM mode with a light or no-load on the output.

Minimize the internal power dissipation of the VCC regulator by connecting VCCX to a 5-V output or to an

external 5-V supply. If the VCCX voltage is above 4.3 V, VCCX is internally connected to VCC and the internal

VCC regulator is disabled. Tie VCCX to PGND if it is unused. Never connect VCCX to a voltage greater than 6.5

V. If an external supply is connected to VCCX to power the LM5148, VIN must be greater than the external bias

voltage during all conditions to avoid damage to the controller.

8.3.3 Precision Enable (EN)

The EN pin can be connected to a voltage as high as 80 V. The LM5148 has a precision enable. When the EN

voltage is greater than 1 V, controller switching is enabled. If the EN pin is pulled below 0.5 V, the LM5148 is

in shutdown with an IQ of 2.3 μA (typical) current consumption from VIN. When the enable voltage is between

0.5 V and 1 V, the LM5148 is in standby mode with the VCC regulator active but the controller is not switching.

In standby mode, the non-switching input quiescent current is 124-μA typical. The LM5148 is enabled with a

voltage greater than 1.0 V. However, many applications benefit from using a resistor divider RUV1 and RUV2, as

shown in Figure 8-2, to establish a precision UVLO level. TI does not recommend leaving the EN pin floating.

Use Equation 2 and Equation 3 to calculate the UVLO resistors given the required input turn-on and turn-off

voltages.

IN(on)

IN(off)

UV1

HYS

(2)

UV2

UV1

IN(on)

(3)

RUV2

RUV1

Enable

Comparator

10 µA

VDDA

VIN

Figure 8-2. Programmable Input Voltage UVLO Turn-On

8.3.4 Power-Good Monitor (PG)

The LM5148 includes an output voltage monitoring signal for VOUT to simplify sequencing and supervision.

The power-good signal is used for start-up sequencing of downstream converters, fault protection, and output

monitoring. The power-good output (PG) switches to a high impedance open-drain state when the output voltage

is in regulation. The PG switches low when the output voltage drops below the lower power-good threshold

(92% typical) or rises above the upper power-good threshold (110% typical). A 25-µs deglitch filter prevents false

tripping of the power-good signal during transients. TI recommends a pullup resistor of 100 kΩ (typical) from PG

to the relevant logic rail. PG is asserted low during soft start and when the buck regulator is disabled.

www.ti.com

LM5148

SNVSC01 – FEBRUARY 2023

Submit Document Feedback

Product Folder Links: LM5148

LM5145 датащи(PDF) 17 Page - Texas Instruments

LM5145 датащи(HTML) 17 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

датащи скачать

ссылки URL