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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H753II датащи(PDF) 197 Page - STMicroelectronics |
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STM32H753II датащи(HTML) 197 Page - STMicroelectronics |
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197 / 361 page  DS12117 Rev 8 197/360 STM32H753xI Electrical characteristics (rev Y) 318 Figure 55. MDIO Slave timing diagram SD/SDIO MMC card host interface (SDMMC) characteristics Unless otherwise specified, the parameters given in Table 109 for the SDIO/MMC interface are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDD supply voltage conditions summarized in Table 23: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD • I/O compensation cell enabled • HSLV activated when VDD ≤ 2.7 V Refer to Section 6.3.15: I/O port characteristics for more details on the input/output characteristics. MSv40460V1 tsu(MDIO) tMDC) th(MDIO) td(MDIO) Table 109. Dynamic characteristics: SD / MMC characteristics, VDD = 2.7 to 3.6 V(1)(2) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 125 MHz tW(CKL) Clock low time fPP =50 MHz 9.5 10.5 - ns tW(CKH) Clock high time 8.5 9.5 - CMD, D inputs (referenced to CK) in MMC and SD HS/SDR/DDR mode tISU Input setup time HS fPP ≥ 50 MHz 3- - ns tIH Input hold time HS 0.5 - - tIDW(3) Input valid window (variable window) 3 - - CMD, D outputs (referenced to CK) in MMC and SD HS/SDR/DDR mode tOV Output valid time HS fPP ≥ 50 MHz -3.5 5 ns tOH Output hold time HS 2 - - |
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