STM32H753II datasheet(171/361 Pages) STMICROELECTRONICS

номер детали	STM32H753II

подробное описание детали	32-bit Arm® Cortex®-M7 480MHz MCUs, 2MB Flash,1MB RAM, 46 com. and analog interfaces, crypto

PDF	361 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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171 / 361 page

DS12117 Rev 8

171/360

STM32H753xI

Electrical characteristics (rev Y)

318

6.3.21

DAC electrical characteristics

Table 88. DAC characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply voltage

1.8

3.3

3.6

VREF+

Positive reference voltage

1.80

VDDA

VREF-

Negative reference

voltage

VSSA

Resistive Load

DAC output

buffer ON

connected to

VSSA

㏀

connected to

VDDA

RO(2)

Output Impedance

DAC output buffer OFF

10.3

RBON

Output impedance sample

and hold mode, output

buffer ON

DAC output

buffer ON

VDD = 2.7 V

1.6

㏀

VDD = 2.0 V

2.6

RBOFF

Output impedance sample

and hold mode, output

buffer OFF

DAC output

buffer OFF

VDD = 2.7 V

17.8

㏀

VDD = 2.0 V

18.7

CL(2)

Capacitive Load

DAC output buffer OFF

CSH(2)

Sample and Hold mode

0.1

µF

VDAC_OUT

Voltage on DAC_OUT

output

DAC output buffer ON

0.2

VREF+

−0.2

DAC output buffer OFF

VREF+

tSETTLING

Settling time (full scale: for

a 12-bit code transition

between the lowest and

the highest input codes

when DAC_OUT reaches

the final value of ±0.5LSB,

±1LSB, ±2LSB, ±4LSB,

±8LSB)

Normal mode, DAC output buffer

OFF, ±1LSB CL=10 pF

-1.7(2)

2(2)

µs

tWAKEUP(3)

Wakeup time from off

state (setting the Enx bit in

the DAC Control register)

until the ±1LSB final value

Normal mode, DAC output buffer

ON, CL ≤ 50 pF, RL = 5 ㏀

-5

7.5

µs

Voffset(2)

Middle code offset for 1

trim code step

VREF+ = 3.6 V

850

µV

VREF+ = 1.8 V

425

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