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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H753II датащи(PDF) 157 Page - STMicroelectronics |
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STM32H753II датащи(HTML) 157 Page - STMicroelectronics |
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157 / 361 page  DS12117 Rev 8 157/360 STM32H753xI Electrical characteristics (rev Y) 318 Figure 30. Synchronous non-multiplexed PSRAM write timings MS32760V1 FMC_CLK FMC_NEx FMC_A[25:0] FMC_NWE FMC_D[15:0] D1 D2 FMC_NWAIT (WAITCFG = 0b, WAITPOL + 0b) tw(CLK) tw(CLK) Data latency = 0 td(CLKL-NExL) td(CLKH-NExH) td(CLKL-AV) td(CLKH-AIV) td(CLKH-NWEH) td(CLKL-NWEL) td(CLKL-Data) tsu(NWAITV-CLKH) th(CLKH-NWAITV) FMC_NADV td(CLKL-NADVL) td(CLKL-NADVH) td(CLKL-Data) FMC_NBL td(CLKH-NBLH) Table 76. Synchronous non-multiplexed PSRAM write timings(1) Symbol Parameter Min Max Unit t(CLK) FMC_CLK period 2Tfmc_ker_ck − 1 - ns td(CLKL-NExL) FMC_CLK low to FMC_NEx low (x=0..2) - 2 t(CLKH-NExH) FMC_CLK high to FMC_NEx high (x= 0…2) Tfmc_ker_ck + 0.5 - td(CLKL-NADVL) FMC_CLK low to FMC_NADV low - 0.5 td(CLKL-NADVH) FMC_CLK low to FMC_NADV high 0 - td(CLKL-AV) FMC_CLK low to FMC_Ax valid (x=16…25) - 2 td(CLKH-AIV) FMC_CLK high to FMC_Ax invalid (x=16…25) Tfmc_ker_ck - td(CLKL-NWEL) FMC_CLK low to FMC_NWE low - 1.5 td(CLKH-NWEH) FMC_CLK high to FMC_NWE high Tfmc_ker_ck + 1 - td(CLKL-Data) FMC_D[15:0] valid data after FMC_CLK low - 3.5 td(CLKL-NBLL) FMC_CLK low to FMC_NBL low - 2 td(CLKH-NBLH) FMC_CLK high to FMC_NBL high Tfmc_ker_ck + 1 - tsu(NWAIT-CLKH) FMC_NWAIT valid before FMC_CLK high 2 - th(CLKH-NWAIT) FMC_NWAIT valid after FMC_CLK high 2 - 1. Guaranteed by characterization results. |
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